Hi, I am an electronics undergraduate interested in FPGAs , Digital logic design and machine learning with FPGAs.
-
NIT Warangal
- Warangal
-
22:18
(UTC +05:30) - in/prakashsharma059
Block or Report
Block or report maverick-sp
Report abuse
Contact GitHub support about this user’s behavior. Learn more about reporting abuse.
Report abusePopular repositories
-
Project_Vending_Machine_Using_VerilogHDL
Project_Vending_Machine_Using_VerilogHDL PublicThis is a project I did during my Digital Design Course
Verilog 3
-
Traffic-Light-Controller
Traffic-Light-Controller PublicAn Algorithmic State Machine (ASM) based traffic light controller for a road crossing of ExpressWay and LocalWay
Verilog
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.