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9 followers · 8 following
  • UNIBO
  • Italy, Bologna

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Popular repositories

  1. RISC RISC Public

    Project for course Digital systems design at FER.

    VHDL

  2. hwpe_test hwpe_test Public

    Testiranje hwpe

    SystemVerilog

  3. hwpe-stream hwpe-stream Public

    Forked from pulp-platform/hwpe-stream

    IPs for data-plane integration of Hardware Processing Engines (HWPEs) within a PULP system

    SystemVerilog 1

  4. hwpe-ctrl hwpe-ctrl Public

    Forked from pulp-platform/hwpe-ctrl

    IPs for control-plane integration of Hardware Processing Engines (HWPEs) within a PULP system

    SystemVerilog 1

  5. hwpe-color-converter hwpe-color-converter Public

    HWPE RGB to YCbCr color converting processing engine.

    SystemVerilog

  6. tree-sitter-frisc tree-sitter-frisc Public

    Tree-sitter for FRISC assembly language.

    C