Run OPENFPGA failed with VPR_BLIF

[anhdv2000]

I tried running your VPR_BLIF flow with my blif file, but it failed during the simulation step; the FPGA output is X.

I have tried numerous test cases in the basic_test, but the results all show errors as mentioned above. Could you provide an example that runs successfully with the attached blif file and benchmark file?

Please use the VPR_BLIF flow

test_blif.txt
test_benchmark.txt