stm32f0: Improve RCC driver implementation #1439
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karlp
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Sep 19, 2022
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Commits 2 and 3 look good, but with commits 2 and 3, we simply don't need or ever want, commit 1. |
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Target coding style issues. No functional change. Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de>
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Hi, I am interested in this PR, how can I help get it merged ? FYI, i had to fix a few things which are available in my fork: https://github.com/SiemaApplications/libopencm3/commits/f0_rcc |
Update the macro name used to avoid referencing a particular peripheral.
All STM32 achitectures exept STMF0 define RCC_CFGR_PLLMUL_X without shift. The nessesary shift is done in rcc_set_pll_multiplication_factor(). Handle RCC_CFGR_PLLMUL_X as all other STM32 achitectures and consolidate rcc_set_pll_multiplication_factor(). Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de>
As on every other family. Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de>
When using HSI on stm32f0, the flash waitstates must be configured to 1.
libopencm3 lacks support for 16MHz external clocks. Add support for these clocks. Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de>
I have no clue, how this is handled.
Thanks for the fix. Regards |
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Hi,
the stm32f0 rcc driver implemantation lacks support for 16MHz external clocks.
Patch 1 adds support for it,
Patch 2 is a consolitating and preperatory step towards struct based clock helpers,
while patch 3 adds them.
The series is tested on a custom STM32F030F4P6 based board (16MHz crystal).
Regards
Benedikt Spranger