Convert std project into a no_std project

Author: jonlamb-gh

.cargo/config

@@ -0,0 +1,14 @@
+[target.thumbv7em-none-eabihf]
+runner = 'arm-none-eabi-gdb'
+rustflags = [
+  "-C", "link-arg=-Wl,-Tlink.x",
+  "-C", "link-arg=-nostartfiles",
+
+  # uncomment to use rustc LLD to link programs (a)
+  # "-C", "link-arg=-Tlink.x",
+  # "-C", "linker=lld",
+  # "-Z", "linker-flavor=ld.lld",
+]
+
+[build]
+target = "thumbv7em-none-eabihf"

.gdbinit

@@ -0,0 +1,21 @@
+target remote :3333
+
+# print demangled symbols by default
+set print asm-demangle on
+
+monitor arm semihosting enable
+
+# # send captured ITM to the file itm.fifo
+# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
+# # 8000000 must match the core clock frequency
+# monitor tpiu config internal itm.fifo uart off 8000000
+
+# # OR: make the microcontroller SWO pin output compatible with UART (8N1)
+# # 2000000 is the frequency of the SWO pin
+# monitor tpiu config external uart off 8000000 2000000
+
+# # enable ITM port 0
+# monitor itm port 0 on
+
+load
+step

Cargo.lock

@@ -4,3 +4,20 @@ version = "0.0.1"
 authors = ["jonlamb-gh <lamb.jon.io@gmail.com>"]
 
 [dependencies]
+cortex-m = "0.5.2"
+cortex-m-semihosting = "0.3.0"
+panic-semihosting = "0.3.0"
+
+[dependencies.cortex-m-rt]
+version = "0.5.1"
+features = ["device"]
+
+[dependencies.nucleo-f767zi]
+version = "0.0.1"
+git = "https://github.com/jonlamb-gh/nucleo-f767zi.git"
+branch = "devel"
+features = ["rt"]
+
+[profile.release]
+codegen-units = 1 # better optimizations
+lto = true # better optimizations

Cargo.toml

@@ -1 +1,30 @@
-# oxcc
+# oxcc
+
+## Building
+
+```bash
+# rustc 1.29.0-nightly (54628c8ea 2018-07-30)
+cargo build
+```
+
+## Debugging
+
+```bash
+./scripts/run-openocd
+
+# or manually
+# openocd -f board/stm32f7discovery.cfg
+```
+
+```bash
+cargo run
+
+# or manually
+# arm-none-eabi-gdb target/thumbv7em-none-eabihf/debug/oxcc
+```
+
+## Links
+
+- [BSP crate](https://github.com/jonlamb-gh/nucleo-f767zi)
+- [HAL crate](https://github.com/jonlamb-gh/stm32f767-hal)
+- [device crate](https://github.com/adamgreig/stm32-rs/tree/master/stm32f7)

README.md

@@ -0,0 +1,24 @@
+MEMORY
+{
+    /* NOTE K = KiBi = 1024 bytes */
+
+    /* STM32F767ZI 2 MByte FLASH, 512 KByte RAM */
+    FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
+    RAM (xrw)  : ORIGIN = 0x20000000, LENGTH = 512K
+}
+
+/* This is where the call stack will be allocated. */
+/* The stack is of the full descending type. */
+/* You may want to use this variable to locate the call stack and static
+   variables in different memory regions. Below is shown the default value */
+/* _stack_start = ORIGIN(RAM) + LENGTH(RAM); */
+
+/* You can use this symbol to customize the location of the .text section */
+/* If omitted the .text section will be placed right after the .vector_table
+   section */
+/* This is required only on microcontrollers that store some configuration right
+   after the vector table */
+/* _stext = ORIGIN(FLASH) + 0x400; */
+
+/* Size of the heap (in bytes) */
+/* _heap_size = 1024; */

memory.x

@@ -0,0 +1,7 @@
+#!/usr/bin/env bash
+
+set -e
+
+openocd -f board/stm32f7discovery.cfg
+
+exit 0

scripts/run-openocd

@@ -1,16 +1,51 @@
-// https://github.com/PolySync/oscc/wiki/Hardware-Main
-// https://github.com/jonlamb-gh/oscc/
+#![no_main]
+#![no_std]
+
+extern crate cortex_m;
+#[macro_use]
+extern crate cortex_m_rt as rt;
+extern crate cortex_m_semihosting as sh;
+extern crate nucleo_f767zi;
+extern crate panic_semihosting;
 
 mod fault_condition;
 mod pid;
 mod throttle_module;
 
-use throttle_module::ThrottleModule;
+use core::fmt::Write;
+use cortex_m::peripheral::syst::SystClkSource;
+use nucleo_f767zi::hal::stm32f7x7;
+use rt::ExceptionFrame;
+use sh::hio;
+
+entry!(main);
+
+fn main() -> ! {
+    let mut stdout = hio::hstdout().unwrap();
+    let peripherals = cortex_m::Peripherals::take().unwrap();
+    //let peripherals = stm32f7x7::Peripherals::take().unwrap();
+
+    let mut syst = peripherals.SYST;
+
+    // need to fix/add HAL RCC to get full clock speed
+    syst.set_clock_source(SystClkSource::Core);
+    syst.set_reload(8_000_000); // 1s
+    syst.enable_counter();
 
-fn main() {
-    println!("Hello, world!");
+    loop {
+        while !syst.has_wrapped() {}
+        writeln!(stdout, "Hello, world!").unwrap();
+    }
+}
+
+exception!(HardFault, hard_fault);
+
+fn hard_fault(ef: &ExceptionFrame) -> ! {
+    panic!("HardFault at {:#?}", ef);
+}
 
-    let _throttle_module = ThrottleModule::new();
+exception!(*, default_handler);
 
-    println!("All done");
+fn default_handler(irqn: i16) {
+    panic!("Unhandled exception (IRQn = {})", irqn);
 }