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SYMPL_IEEE754-2019_ISA
SYMPL_IEEE754-2019_ISA PublicSYMPL IEEE 754-2019 Instruction Set Architecture Compute Engine
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HedgeHog-Fused-Spiking-Neural-Network-Emulator-Compute-Engine
HedgeHog-Fused-Spiking-Neural-Network-Emulator-Compute-Engine PublicHedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx Kintex Ultra Plus brand FPGAs and embedded RISC-V as trainer.
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CustomASM-for-SYMPL-ISA
CustomASM-for-SYMPL-ISA PublicSYMPL ISA Rule table for open-source CustomASM cross-assembler.
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64-bit-Universal-Floating-Point-ISA-Compute-Engine
64-bit-Universal-Floating-Point-ISA-Compute-Engine PublicRISC-V Rocket Chip Strap-on-Booster with Fused Universal Neural Network (FuNN) eNNgine
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Conscious_Gate_Transistor
Conscious_Gate_Transistor PublicConscious Gate Transistor for creating conscious computers and machines. Provisional Patent Application with OpenSCAD 3D models.
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