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Backport xtensa_codegen to main (v2) #7432
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* Improved gather_load with IVP_GATHER * Improved gather_load specialization
…es with 0_off_3 functions. (#7184) * Added missing types to CodeGen_Xtensa.cpp and fixed the issues with 0_off_3 functions * improved is_extract_0_of_3 variable naming
…he common Xtensa code there. (#7186) * Added add_platform_headers hook in CodeGen_C and relocated the common Xtensa code there. * Fixed spelling mistake in the comment and improved the function naming to add_platform_prologue
…o xtensa-codegen
It's functionally identical to posix_allocator.cpp and the WEAK issue should be resolved by now.
* [xtensa] Also special-case WEAK_INLINE for xtensa * Update runtime_internal.h * Also use the version of `halide_malloc_alignment()` from runtime_internal.h instead of an extern decl, so we can inline it
* [xtensa] Added initial support for float16_t * Added SELECT support for float16_t * [xtensa] added conversions between float16_t and int32_t
* Commented failing tests out * [xtensa] fixed most of failing tests * [xtensa] added sanitized op name check to simd_op_check_xtensa * [xtensa] Made `serialize` to be a pure function, fixed IVP_MULN_2X32 test
* [xtensa] Add xtensa_io.cpp This is a better option than posix_io.cpp on Xtensa * Update xtensa_io.cpp
* [xtensa] DMA support improvements. This includes multiple related changes: * all transactions are 2D. * Each buffer will use a separate DMA channel. * For the case when destination is an output buffer, we can delay the wait for completion until the beginning of it's producer. * Fix review comments * Handle an error in halide_init_dma * Address review comments
Fix was made in Codegen_C.cpp a while back; the cache must be clear and end-of-func to avoid trying to share assignments between do-par-for lambdas.
Passing __user_context doesn't always get the constness right; _ucon does and is terser
* [xtensa] Renamed SEL instructions to semantically correct * [xtensa] updated the types definitions in halide_xtensa_div32 * [xtensa] added int32 by int16 vector division * [xtensa] replaced convert int16->int32_x2->int16 to two interleavs for better efficiency
…o xtensa-codegen
* Fix simd_op_check_xtensa * Update simd_op_check_xtensa.cpp
…8108) [xtensa] added vector extracts for floats + moved float16_t and int48_t to prologue
* [Xtensa codegen] Specializations for load/store and fma support * format
…8215) Fixed index conversion for gather_load with undefined ramp
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This backports the branch for Xtensa codegen into main. Note that it deliberately ignores changes to apps/ (which had grown stale); those changes may or may not be backported at a later date.
Aside from simd_op_check_xtensa, there are few tests for the new codegen paths; the next step to remedy that will be updating the buildbots to add code coverage for the existing test suite to the extent that is possible via AOT only (since the Xtensa codegen does not support JIT).