Add Support for AMDGPU CDNA2 Architectures based on XML ISA spec (#1107)

Add Initial Support for cdna based on the lastest version of XML file ( 20210720 ) Added new register names based on the latest xml-isa drop Decoder implementation updated based on the latest xml-isa drop renumbered registers to make low registers have the same value as full register (or its super set) add larger memoery types for representing consecutive registers used as a single operand Modify the format function to output multiple registers as a single operand correctly, handling for certain registers are still being worked on split register-vector into multiple registers
dyninst · Feb 23, 2022 · a858352 · a858352
1 parent b8fed71
commit a858352
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Showing 44 changed files with 35,037 additions and 4,267 deletions.
diff --git a/common/h/AMDGPU/cdna2/amdgpu_cdna2_sys_regs.h b/common/h/AMDGPU/cdna2/amdgpu_cdna2_sys_regs.h
diff --git a/common/h/amdgpu_cdna2_op_table.h b/common/h/amdgpu_cdna2_op_table.h
diff --git a/common/h/amdgpu_cdna2_sys_regs.h b/common/h/amdgpu_cdna2_sys_regs.h
diff --git a/common/h/amdgpu_cdna_op_table.h b/common/h/amdgpu_cdna_op_table.h
diff --git a/common/h/amdgpu_cdna_sys_regs.h b/common/h/amdgpu_cdna_sys_regs.h
diff --git a/common/h/amdgpu_op_table.h b/common/h/amdgpu_op_table.h
diff --git a/common/h/dyn_regs.h b/common/h/dyn_regs.h
diff --git a/common/h/entryIDs.h b/common/h/entryIDs.h
@@ -3008,6 +3008,8 @@ power_op_dxex,
   aarch64_op_zip2_advsimd,
   amdgpu_op_sop1_nop,
 #include "amdgpu_op_table.h"
+#include "amdgpu_cdna_op_table.h"
+#include "amdgpu_cdna2_op_table.h"
   cuda_op_general,
   cuda_op_call,
   intel_gpu_op_general,

diff --git a/common/src/dyn_regs.C b/common/src/dyn_regs.C
diff --git a/dwarf/src/dwarfHandle.C b/dwarf/src/dwarfHandle.C
@@ -197,11 +197,11 @@ bool DwarfHandle::init_dbg()
         case EM_CUDA:
             arch = Dyninst::Arch_cuda;
             break;
-        case EM_AMDGPU: {
+        case EM_AMDGPU: { // TODO: This part of logic needs to be updated to reflect the table on the llvm website
             unsigned int ef_amdgpu_mach = 0x000000ff & file->e_flags();
 			switch(ef_amdgpu_mach){
-				case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: case 0x38:
-					arch = Dyninst::Arch_amdgpu_rdna;
+                case 0x3f:
+					arch = Dyninst::Arch_amdgpu_cdna2;
                     break;
 				case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: case 0x30: case 0x31:
 					arch = Dyninst::Arch_amdgpu_vega;

diff --git a/elf/src/Elf_X.C b/elf/src/Elf_X.C
@@ -1829,9 +1829,8 @@ Dyninst::Architecture Elf_X::getArch() const
                 unsigned int ef_amdgpu_mach = 0x000000ff & e_flags();
                 //cerr << " dealing with amd gpu , mach = "  << std::hex << ef_amdgpu_mach << endl;
                 switch(ef_amdgpu_mach){
-                    case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: case 0x38:
-                        return Dyninst::Arch_amdgpu_rdna;
-                        assert( 0 && "rdna not supported yet " );
+                    case 0x3f:
+                        return Dyninst::Arch_amdgpu_cdna2;
                     case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: case 0x30: case 0x31:
                         return Dyninst::Arch_amdgpu_vega;
                     case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17: case 0x18:
@@ -1840,6 +1839,7 @@ Dyninst::Architecture Elf_X::getArch() const
                     case 0x27: case 0x32 : case 0x39:
                         assert(0 && "reserved");
                     default:
+                        //cerr  << "unsupported amdgpu architecture , value = " << ef_amdgpu_mach << endl;
                         assert(0 && "probabily won't be supported");
 
                 }

diff --git a/instructionAPI/CMakeLists.txt b/instructionAPI/CMakeLists.txt
@@ -2,6 +2,8 @@
 
 include_directories (
     ${PROJECT_SOURCE_DIR}/instructionAPI/src
+    ${PROJECT_SOURCE_DIR}/instructionAPI/src/AMDGPU/cdna2
+    ${PROJECT_SOURCE_DIR}/instructionAPI/src/AMDGPU/vega
   )
 
 
@@ -21,7 +23,8 @@ set (SRC_LIST
      src/InstructionDecoder-x86.C
      src/InstructionDecoder-power.C 
      src/InstructionDecoder-aarch64.C 
-     src/InstructionDecoder-amdgpu-vega.C
+     src/AMDGPU/vega/InstructionDecoder-amdgpu-vega.C
+     src/AMDGPU/cdna2/InstructionDecoder-amdgpu-cdna2.C
      src/InstructionDecoderImpl.C
   )
 SET_SOURCE_FILES_PROPERTIES(${SRC_LIST} PROPERTIES LANGUAGE CXX)

diff --git a/instructionAPI/h/Instruction.h b/instructionAPI/h/Instruction.h
@@ -92,6 +92,8 @@ namespace Dyninst
         friend class InstructionDecoder_power;
         friend class InstructionDecoder_aarch64;
         friend class InstructionDecoder_amdgpu_vega;
+        friend class InstructionDecoder_amdgpu_cdna;
+        friend class InstructionDecoder_amdgpu_cdna2;
 
         struct CFT
         {

diff --git a/instructionAPI/h/Operation_impl.h b/instructionAPI/h/Operation_impl.h
@@ -102,6 +102,9 @@ namespace Dyninst
       friend class InstructionDecoder_power; // for editing mnemonics after creation
       friend class InstructionDecoder_aarch64;
       friend class InstructionDecoder_amdgpu_vega;
+      friend class InstructionDecoder_amdgpu_cdna;
+      friend class InstructionDecoder_amdgpu_cdna2;
+      friend class Instruction; // to make use of the update size function
 
     public:
       INSTRUCTION_EXPORT Operation_impl(NS_x86::ia32_entry* e, NS_x86::ia32_prefixes* p = NULL, ia32_locations* l = NULL,