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Updating some places to cover xmm16-xmm31 (#84088)
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* Updating some places to cover xmm16-xmm31

* Remove XMM0-XMM31 and K0-K7 from mapRegNumToDwarfReg
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@tannergooding
tannergooding committed Mar 29, 2023
1 parent 3f5cb18 commit db93e03
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Showing 5 changed files with 37 additions and 82 deletions.
56 changes: 28 additions & 28 deletions docs/design/coreclr/botr/clr-abi.md
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Expand Up @@ -711,34 +711,34 @@ The general rules outlined in the System V x86_64 ABI documentation are followed
6. The following table describes register usage according to the System V x86_64 ABI

```
| Register | Usage | Preserved across |
| | | function calls |
|--------------|-----------------------------------------|-------------------|
| %rax | temporary register; with variable argu- | No |
| | ments passes information about the | |
| | number of SSE registers used; | |
| | 1st return argument | |
| %rbx | callee-saved register; optionally used | Yes |
| | as base pointer | |
| %rcx | used to pass 4st integer argument to | No |
| | to functions | |
| %rdx | used to pass 3rd argument to functions | No |
| | 2nd return register | |
| %rsp | stack pointer | Yes |
| %rbp | callee-saved register; optionally used | Yes |
| | as frame pointer | |
| %rsi | used to pass 2nd argument to functions | No |
| %rdi | used to pass 1st argument to functions | No |
| %r8 | used to pass 5th argument to functions | No |
| %r9 | used to pass 6th argument to functions | No |
| %r10 | temporary register, used for passing a | No |
| | function's static chain pointer | |
| %r11 | temporary register | No |
| %r12-%r15 | callee-saved registers | Yes |
| %xmm0-%xmm1 | used to pass and return floating point | No |
| | arguments | |
| %xmm2-%xmm7 | used to pass floating point arguments | No |
| %xmm8-%xmm15 | temporary registers | No |
| Register | Usage | Preserved across |
| | | function calls |
|---------------|-----------------------------------------|-------------------|
| %rax | temporary register; with variable argu- | No |
| | ments passes information about the | |
| | number of SSE registers used; | |
| | 1st return argument | |
| %rbx | callee-saved register; optionally used | Yes |
| | as base pointer | |
| %rcx | used to pass 4st integer argument to | No |
| | to functions | |
| %rdx | used to pass 3rd argument to functions | No |
| | 2nd return register | |
| %rsp | stack pointer | Yes |
| %rbp | callee-saved register; optionally used | Yes |
| | as frame pointer | |
| %rsi | used to pass 2nd argument to functions | No |
| %rdi | used to pass 1st argument to functions | No |
| %r8 | used to pass 5th argument to functions | No |
| %r9 | used to pass 6th argument to functions | No |
| %r10 | temporary register, used for passing a | No |
| | function's static chain pointer | |
| %r11 | temporary register | No |
| %r12-%r15 | callee-saved registers | Yes |
| %xmm0-%xmm1 | used to pass and return floating point | No |
| | arguments | |
| %xmm2-%xmm7 | used to pass floating point arguments | No |
| %xmm8-%xmm31 | temporary registers | No |
```

# Calling convention specifics for x86
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2 changes: 1 addition & 1 deletion src/coreclr/jit/codegencommon.cpp
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Expand Up @@ -5345,7 +5345,7 @@ void CodeGen::genFinalizeFrame()

#if defined(TARGET_XARCH)
// Compute the count of callee saved float regs saved on stack.
// On Amd64 we push only integer regs. Callee saved float (xmm6-xmm15)
// On Amd64 we push only integer regs. Callee saved float (xmm6-xmm31)
// regs are stack allocated and preserved in their stack locations.
compiler->compCalleeFPRegsSavedMask = maskCalleeRegsPushed & RBM_FLT_CALLEE_SAVED;
maskCalleeRegsPushed &= ~RBM_FLT_CALLEE_SAVED;
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11 changes: 7 additions & 4 deletions src/coreclr/jit/emitxarch.cpp
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Expand Up @@ -9669,14 +9669,14 @@ const char* emitter::emitRegName(regNumber reg, emitAttr attr, bool varName)
return emitXMMregName(reg);

case EA_8BYTE:
if ((REG_XMM0 <= reg) && (reg <= REG_XMM15))
if (IsXMMReg(reg))
{
return emitXMMregName(reg);
}
break;

case EA_4BYTE:
if ((REG_XMM0 <= reg) && (reg <= REG_XMM15))
if (IsXMMReg(reg))
{
return emitXMMregName(reg);
}
Expand Down Expand Up @@ -9759,21 +9759,24 @@ const char* emitter::emitRegName(regNumber reg, emitAttr attr, bool varName)

switch (EA_SIZE(attr))
{
case EA_64BYTE:
return emitZMMregName(reg);

case EA_32BYTE:
return emitYMMregName(reg);

case EA_16BYTE:
return emitXMMregName(reg);

case EA_8BYTE:
if ((REG_XMM0 <= reg) && (reg <= REG_XMM7))
if (IsXMMReg(reg))
{
return emitXMMregName(reg);
}
break;

case EA_4BYTE:
if ((REG_XMM0 <= reg) && (reg <= REG_XMM7))
if (IsXMMReg(reg))
{
return emitXMMregName(reg);
}
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2 changes: 1 addition & 1 deletion src/coreclr/jit/lclvars.cpp
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Expand Up @@ -6391,7 +6391,7 @@ void Compiler::lvaAssignVirtualFrameOffsetsToLocals()
lvaIncrementFrameSize(extraSlotSize);
}

// In case of Amd64 compCalleeRegsPushed does not include float regs (Xmm6-xmm15) that
// In case of Amd64 compCalleeRegsPushed does not include float regs (xmm6-xmm31) that
// need to be pushed. But Amd64 doesn't support push/pop of xmm registers.
// Instead we need to allocate space for them on the stack and save them in prolog.
// Therefore, we consider xmm registers being saved while computing stack offsets
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48 changes: 0 additions & 48 deletions src/coreclr/jit/unwindamd64.cpp
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Expand Up @@ -71,54 +71,6 @@ short Compiler::mapRegNumToDwarfReg(regNumber reg)
case REG_R15:
dwarfReg = 15;
break;
case REG_XMM0:
dwarfReg = 17;
break;
case REG_XMM1:
dwarfReg = 18;
break;
case REG_XMM2:
dwarfReg = 19;
break;
case REG_XMM3:
dwarfReg = 20;
break;
case REG_XMM4:
dwarfReg = 21;
break;
case REG_XMM5:
dwarfReg = 22;
break;
case REG_XMM6:
dwarfReg = 23;
break;
case REG_XMM7:
dwarfReg = 24;
break;
case REG_XMM8:
dwarfReg = 25;
break;
case REG_XMM9:
dwarfReg = 26;
break;
case REG_XMM10:
dwarfReg = 27;
break;
case REG_XMM11:
dwarfReg = 28;
break;
case REG_XMM12:
dwarfReg = 29;
break;
case REG_XMM13:
dwarfReg = 30;
break;
case REG_XMM14:
dwarfReg = 31;
break;
case REG_XMM15:
dwarfReg = 32;
break;
default:
noway_assert(!"unexpected REG_NUM");
}
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