Does Rocket/BOOM implement any type of IOMMU?

[sammy17]

I noticed that IOMMU specification is still a work in progress for RISC-V which provides critical protection against DMA attacks (being able to access privileged/kernel memory through DMA).

Is there any IOMMU implementation or something equivalent that prevents an HW component (e.g.- an accelerator) that has DMA from accessing all of the physical memory in the latest version of Rocket chip?

In other words, what I am asking is, are RISC-V systems (SoCs) that have DMA, vulnerable to DMA attacks?

Really appreciate any thoughts on this.

[jerryz123]

I don't believe there are any IOMMU implementations for rocket-chip floating around.

A spec-compliant implementation would be a worthy contribution to the rocket-chip repo, if someone is willing. I'm not very familiar with the IOMMU spec, perhaps a minimal implementation is not too burdensome.

[sammy17]

I see, thanks for the information!