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fix(smmuv2): fix smmu_cntxt_hw struct #133

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merged 1 commit into from May 22, 2024
Merged

fix(smmuv2): fix smmu_cntxt_hw struct #133

merged 1 commit into from May 22, 2024

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Diogo21Costa
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This pull request addresses an issue in the SMMUv2 struct definition (smmu_cntxt_hw) where PMEVCNTRm and PMEVTYPERm were incorrectly defined as single 32-bit registers, when in fact, they are arrays of 15 positions of 32-bit registers each. This fix ensures that the struct accurately matches the smmuv2 specification of these registers within the SMMU context hardware.

Signed-off-by: Diogo Costa <diogoandreveigacosta@gmail.com>
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@danielRep danielRep left a comment

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Seems correct per the ARM SMMU architecture v2.0, page 150

The SMMU architecture permits a maximum of:
• 256 implemented event counters in total.
• 256 Counter groups.
• 15 counters in a Counter group.

@danielRep danielRep merged commit 35d7342 into main May 22, 2024
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@danielRep danielRep deleted the fix/smmuv2 branch May 22, 2024 11:01
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3 participants