ECPIX-5 support #428
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ECPIX-5 support #428
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Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
The flash chip on my board is an ISSI IS26LP256P chip. The ISSI chip requires slightly different setup for quad mode from the other brands, but works fine with the existing SPI flash interface logic here. Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Not wired to anything at this point. Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
In future we will want to support targets using the same vendor but running at different clock frequencies. Since the clock frequency is a parameter to the gateware generation process, we now name the target directories as "vendor.frequency", i.e., "xilinx.100e6" and "lattice.48e6" rather than "xilinx" and "lattice". Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
This regenerates the verilog code from upstream litex plus a patch to generate outputs from the litesdcard module for controlling bidirectional buffers between the FPGA and SD card. Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Some signals have changed names: "eth_" has been dropped from the names of the MII/GMII/RGMII signals. Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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Can we add this to CI also? something like this should do it: |
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I should mention that the litesdcard verilog was generated by a modified litesdcard tree, which is published at https://github.com/paulusmack/litesdcard (master branch). I have put in a pull request for it, but it hasn't been picked up yet. I don't see why it would be controversial, since it's just exporting a couple of buffer direction control signals that already exist. We need them on the ECPIX-5 to control an external buffer chip between the FPGA and the micro SD card slot. |
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The ECPIX-5 is a FPGA development board from Lambda Concepts with a Lattice ECP5 FPGA and lots of other stuff, including 512MiB of DRAM, 32MiB of SPI flash memory, gigabit ethernet PHY, micro SD card slot, USB2, USB3, HDMI and SATA interfaces, and 8 PMOD slots. It comes in 45K and 85K LUT versions.
This adds basic support for Microwatt on the 85K LUT version of the ECPIX-5, including support for the DRAM, flash memory, ethernet and SD card.
Note that the verilog for litedram, liteeth and litesdcard have been regenerated from recent upstream Litex for all supported targets. I have tested the arty_a7-100 target (and obviously ECPIX-5) but not any of the others.