Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Enhance ADRV9009-ZU11EG multi-class to support selective FMComms8 suport #541

Draft
wants to merge 1 commit into
base: main
Choose a base branch
from

Conversation

tfcollins
Copy link
Collaborator

@tfcollins tfcollins commented Mar 11, 2024

Addresses #535

…port

Signed-off-by: Travis F. Collins <travis.collins@analog.com>
Copy link

Generated documentation for this PR is available at Link

Copy link

github-actions bot commented Mar 11, 2024

Test Results

1 463 tests  ±0     279 ✅ ±0   9m 51s ⏱️ ±0s
    1 suites ±0   1 184 💤 ±0 
    1 files   ±0       0 ❌ ±0 

Results for commit ecdc8d3. ± Comparison against base commit 2061827.

♻️ This comment has been updated with latest results.

@cafeclimber
Copy link

Hey Travis. Sorry for the delay, but finally got around to testing this today. Everything seems to work! I did have to make a few edits to the multi class. There are some checks for fmcomms8 that need to be changed to index into the list. Specifically lines 234, 246, 254, 271, 360, and 374. I just did like you did earlier and changed the for loop to be (e.g.)

for i, dev in enumerate([self.primary] + self.secondaries):
    dev._clock_chip.attrs["sleep_request"].value = "1"
    if self.fmcomms8[i]:
        dev._clock_chip_fmc.attrs["sleep_request"].value = "1"
    dev._clock_chip_carrier.attrs["sleep_request"].value = "1"

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

None yet

2 participants