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Add ad7606x_pi driver #2158
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Add ad7606x_pi driver #2158
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please address first the build issues (cppcheck/dt-bindings check) and also rearrange the commits:
- dt-bindings
- driver support
- Kconfig.adi
- dts
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V2:
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drivers/iio/adc/ad7606x_pi.c
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if (ret) | ||
return ret; | ||
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dev_info(&pdev->dev, "ADI AIM (0x%X) at 0x%08llX mapped to 0x%p, probed ADC %s as %s\n", |
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is this dev_info really needed? We can reduce the number of code lines and return directly: return iio_device_register(indio_dev);
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This can be removed, but in this case the user won't have a message in dmesg when the probe function is successfully completed, as in the case of using cf_axi_adc_core
for ADCs connected to a SPI bus.
drivers/iio/adc/ad7606x_pi.c
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ad7606x_pi_gpio_request(pdev, ad7606x_pi); | ||
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ad7606x_pi->vref = devm_regulator_get(&pdev->dev, "vref"); |
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not sure if we have this in our tree, but you might want to have a look at devm_regulator_get_enable
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I think that devm_regulator_get_enable
function is not available in the current version of the master branch - link.
dma-names = "ad7606x-pi-adc-dma"; | ||
pwms = <&axi_pwm_gen 0 0>; | ||
pwm-names = "cnvst_n"; | ||
vref = "ad7606x_pi_vref"; |
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is this a regulator? if so, please use the -supply
suffix. (example: fc747a3)
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And it needs a handle, not a string.
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Removed, is not necessary in FMC-based evaluation board.
drivers/iio/adc/ad7606x_pi.c
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static int ad7606x_pi_gpio_request(struct platform_device *pdev, struct ad7606x_pi_state *ad7606x_pi) | ||
{ | ||
ad7606x_pi->adc_serpar = devm_gpiod_get_optional(&pdev->dev, "adc_serpar", GPIOD_OUT_LOW); |
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All of these should be vendor properties, e.g. adi,adc_serpar
.
Unless they are already used like that in the wild, and in that case it's too late. But DT maintainers won't be happy.
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V3:
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Must be the device tree identifier of the over-sampling | ||
mode pins. As the line is active high, it should be marked | ||
GPIO_ACTIVE_HIGH to enter ADC Software Mode. | ||
maxItems: 3 |
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all the above are gpios.... So remove the vendor prefix. And you should also have the -gpios
suffix. Look at other examples.
The description is also a bit confusing. Avoid using things like device tree identifier
. Call it property or something else.
"it should be marked GPIO_ACTIVE_HIGH to enter ADC Software Mode."
The above also seems to be redundant to me.... Saying active high should be more than enough
- | | ||
#include <dt-bindings/gpio/gpio.h> | ||
#include <dt-bindings/pwm/pwm.h> | ||
ad7606x_pi: adc@44a00000 { |
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just adc@...
drivers/iio/adc/Kconfig
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@@ -211,6 +211,17 @@ config AD7606_IFACE_SPI | |||
To compile this driver as a module, choose M here: the | |||
module will be called ad7606_spi. | |||
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config AD7606X_PI |
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remove the PI... Also It's not that usual to have names like AD7606X. The 'X' is the odd part of it. Typically one just picks one of the devices (supported by the family) and uses that for the driver. Maybe use ad7606 as no-Os?
https://wiki.analog.com/resources/tools-software/uc-drivers/ad7606
drivers/iio/adc/ad7606x_pi.c
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@@ -0,0 +1,477 @@ | |||
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) |
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BSD-3-Clause is not usually in here (only on the bindings). Was this on purpose?
drivers/iio/adc/ad7606x_pi.c
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.probe = ad7606x_pi_probe, | ||
.driver = { | ||
.name = "ad7606x_pi", | ||
.owner = THIS_MODULE, |
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not needed...
drivers/iio/adc/ad7606x_pi.c
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/* Reset all HDL Cores */ | ||
axiadc_write(ad7606x_pi, ADI_REG_RSTN, 0); | ||
axiadc_write(ad7606x_pi, ADI_REG_RSTN, ADI_RSTN); |
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Before jumping in more in the review I need to bring this up... Why do we have this driver like this? Typically these drivers are connected to:
https://github.com/analogdevicesinc/linux/blob/master/drivers/iio/adc/cf_axi_adc_core.c
Any reason for not doing it here? It looks to me that we are duplicating code (as the above reset)
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@nunojsa This one would be a driver for interfacing the AD7606B/C-16/18 devices parallel interface, in terms of data path using specific data pins and read/write registers by using RD/WR and data pins of the interface (the configuration using the registers would be done by using the parallel interface operation mode).
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I see the design is just using the parallel interface (implemented in HW) so a platform device is likely the only way to go.
However, my question is another one... Why don't we have the platform device just doing the specifs things it has to (for this project) and attaches to the cf_axi_adc_core.c as we do in most of the designs?
For instance, the implementation you have in ad7606x_pi_configure_ring_stream()
is pretty much duplicating what we already have in ad7606x_pi_configure_ring_stream() and that is far from being great
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Yes, implementing only the specific things for the parallel interface and attaching the common part to the cf_axi_adc_core
would be better.
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Hi @nunojsa, we reworked the driver for ad7606 parallel interface so now it integrates with the linux cf_axi_adc_core.c driver as suggested.
Do you have some time to have a look at it?
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Driver has been reworked to integrate with the AXI ADC IP core 1 in linked mode. First patches update the AXI ADC core driver itself to enable it to link with platform device drivers. The AXI ADC interface update was driven by a spatch semantic patch 2 with a few manual tweaks to pass checkpatch. This set provides support for AD7606C-16/-18 as converter frontend ADCs integrated with the AXI ADC IP core Linux driver. The semantic patch can be applied over ongoing/unmerged work to update code to the new interface. |
The latest push has changes to make it pass dt_binding_check (at least locally, I don't understand why it's not passing dt_binding_check pipeline). There is a checkpatch CHECK: Macro argument reuse which doesn't seem to be a problem but Azure pipeline complains anyway. Change log V5 -> V6:
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@alin724 I got kernel build errors from the ad7606_conv.c file, about undefined reference to axiadc_read/axiadc_write calls. Thanks |
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Wondering what is blocking this PR at the moment. |
Change the axiadc_converter device field to store a generic Linux device instead of a SPI device so converters that do not probe as SPI devices will also be able to integrate with the Linux AXI ADC IP CORE driver. Most changes generated with spatch semantic patch. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
Search for platform devices if the AXI ADC core fails to find a converter frontend on the SPI bus. This allows the AXI ADC core to link with converters that probe as platform devices. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
Add update_scan_mode() hook function for converters that may need to do something different while updating the buffer scan mask before buffered readings. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
Add device tree documentation for the axi-ad7606. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Signed-off-by: alin724 <alin-tudor.sferle@analog.com>
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Add support for the parallel interface of AD7606B,C-16/18_FMCZ boards. AD7606 devices will be supported as converter frontend ADCs integrated with the AXI ADC IP core Linux driver. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Signed-off-by: alin724 <alin-tudor.sferle@analog.com>
Add device tree source files for using ad7606C-16/-18 integrated with the AXI ADC IP core. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Signed-off-by: Alin-Tudor Sferle <alin-tudor.sferle@analog.com>
Add AD7606_CONV to the IIO_ALL_ADI_DRIVERS Kconfig. Signed-off-by: alin724 <alin-tudor.sferle@analog.com>
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Applied all suggested changes. Change log v6 -> v7:
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Hi |
Hi @bspguy, From PR description, it looks like the HDL branch for the parallel interface is ad7606x_fmc. |
I think this PR uses the spi engine which this https://github.com/analogdevicesinc/hdl/tree/master/projects/ad7606x_fmc hdl design doesn't. |
Hi @bspguy,
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Thanks @alin724 ! Or perhaps refer me to someone who could help. Thanks! |
Hi, if there are no more suggestions about this patch series maybe we could merge it into master. |
Maybe this one can wait on the backend stuff I'm working on. Then, we don't need more unnecessary changes in the cf drivers. Plus, we can upstream it |
Sure, I've worked with these converter front ends enough to not be willing to rework the drivers again after the iio-backend framework gets accepted upstream :) For note, AD3552R (CN0585 project) (PR #2194) is another driver that shall benefit from the iio-backend fw (the DDS backend part of it). |
Yeps, I noticed we have some pending PRs that can use it. So better wait for it and rework those PULLs afterwards |
I have tested @alin724's PR on the Xilinx ZCU102 board with the EVAL-ad7606CFMCZ. |
Hi @bspguy, that's great. Thanks for reviewing/testing ad7606 parallel interface project. |
Hi @machschmitt |
Waiting for you guys to answer.. |
Hello @bspguy,
Oh, okay. Yes, device tree and device tree overlay files are often submitted in separate PRs. Although, it looks like this PR is not going to be merged because we are going to have new kernel interfaces between the DAC IP core and DAC devices upstream. We (I) must update the ad3552r driver to use the new DAC IP interface (adi-axi-dac) and submit the changes upstream. |
Supported AD7606x family devices in this driver:
Digital interface mode - Parallel:
Eval boards - digital interface mode - parallel:
HDL project and control module for parallel interface - link-project, link-control_module;