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  • RISC-V International
  • Ottawa/ON
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  1. mips-pipelined-processor mips-pipelined-processor Public

    A digital design project for a MIPS Reduced Instruction Set Computer (RISC) pipelined processor design that has a 5 stage basic pipeline and supports 32-bit MIPS instructions with an 8-bit wide dat…

    VHDL

  2. mips-single-cycle-processor mips-single-cycle-processor Public

    A digital design project for a MIPS Reduced Instruction Set Computer (RISC) single-cycle processor design that supports 32-bit MIPS instructions with an 8-bit wide datapath, on a 256x32 ROM and 256…

    VHDL

  3. uart-design uart-design Public

    Structural VHDL Implementation of a Universal Asynchronous Receiver Transmitter (UART) Design Project as part of a Digital Systems course

    VHDL

  4. booths_multiplier booths_multiplier Public

    Digital design project for a simple integer multiplier using Booth's multiplication algorithm made through ASM design method

    VHDL

  5. jsong060/VoiceRemoteApp jsong060/VoiceRemoteApp Public

    Java 1

  6. cpp-works cpp-works Public

    A series of C++ classes illustrating various important advanced cpp concepts studied at the Programming Concepts with C++ course

    C++