Uni project.

A wristwatch with 3 buttons written in VHDL and implemented on an ARTIX-7 FPGA board.

The project is not that big nor impresive, it is the product of a student who is just starting to learn.

Curently badly documented, Sry :(

Name		Name	Last commit message	Last commit date
Latest commit History 19 Commits
README.md		README.md
alarma.vhd		alarma.vhd
clock_1s.vhd		clock_1s.vhd
contraints		contraints
deBouncer.vhd		deBouncer.vhd
driver7seg.vhd		driver7seg.vhd
wristwatch.vhd		wristwatch.vhd

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