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pico-imx6: improve DDR stability for Kingston D2516ECMDXGJD-U on pico…
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…-imx6q
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richard-hu authored and JoeZhang-tn committed Feb 7, 2022
1 parent 510b22f commit 3930a84
Showing 1 changed file with 21 additions and 13 deletions.
34 changes: 21 additions & 13 deletions board/technexion/pico-imx6/pico-imx6_spl.c
Original file line number Diff line number Diff line change
Expand Up @@ -157,6 +157,20 @@ static struct mx6_ddr3_cfg b511ecmdxg_1066mhz = {
.trasmin = 3750,
};

/* Kingston D2516ECMDXGJD-U for i.mx6Quad operating DDR at 528MHz */
static struct mx6_ddr3_cfg d2516ecmdxgjd_1066mhz = {
.mem_speed = 1066,
.density = 4,
.width = 16,
.banks = 8,
.rowaddr = 15,
.coladdr = 10,
.pagesz = 2,
.trcd = 1312,
.trcmin = 5062,
.trasmin = 3750,
};

/* H5T04G63AFR-PB for i.mx6Solo/DL operating DDR at 400MHz */
static struct mx6_ddr3_cfg h5t04g63afr_800mhz = {
.mem_speed = 800,
Expand Down Expand Up @@ -199,18 +213,12 @@ static struct mx6_mmdc_calibration mx6q_2g_mmdc_calib = {
};

static struct mx6_mmdc_calibration mx6q_1g_mmdc_calib = {
.p0_mpwldectrl0 = 0x00000000,
.p0_mpwldectrl1 = 0x00000000,
.p1_mpwldectrl0 = 0x00000000,
.p1_mpwldectrl1 = 0x00000000,
.p0_mpdgctrl0 = 0x032C0340,
.p0_mpdgctrl1 = 0x03300324,
.p1_mpdgctrl0 = 0x032C0338,
.p1_mpdgctrl1 = 0x03300274,
.p0_mprddlctl = 0x423A383E,
.p1_mprddlctl = 0x3638323E,
.p0_mpwrdlctl = 0x363C4640,
.p1_mpwrdlctl = 0x4034423C,
.p0_mpwldectrl0 = 0x000C0019,
.p0_mpwldectrl1 = 0x001C0014,
.p0_mpdgctrl0 = 0x0314031C,
.p0_mpdgctrl1 = 0x03080308,
.p0_mprddlctl =0x3E363438,
.p0_mpwrdlctl = 0x30363836,
};

static struct mx6_mmdc_calibration mx6dl_1g_mmdc_calib = {
Expand Down Expand Up @@ -351,7 +359,7 @@ static void spl_dram_init(void)
*/
ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, SZ_2G);
if (ram_size < SZ_2G) {
mx6_dram_cfg(&mem_s, &mx6q_1g_mmdc_calib, &h5t04g63afr_800mhz);
mx6_dram_cfg(&mem_s, &mx6q_1g_mmdc_calib, &d2516ecmdxgjd_1066mhz);
}
break;
}
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