A curated list of awesome open source hardware design tools with a focus on chip design.
For electronic hardware tools without a focus on chip design see:
https://github.com/kitspace/awesome-electronics
Inspired by awesome-python.
Nic30/hdlConverter - Python System-Verilog/VHDL Parser
christiklein/simpy - discrite event based simulation framework
chipmuenk/pyFDA - A python tool to design time discrete filters
efabless/openlane - Automated RTL to GDS flow based on openRoad, Yosys and more...
ahmed-agiza/EDAViewer - EDAV is a cloud-based open-source viewer for electronic design automation (EDA) design files (LEF, DEF)
cornell-brg/pymtl3 - hardware modeling framework
mortbopet/VSRTL - Visual Simulation of Register Transfer Logic
freechipsproject/Chisel - Hardware Description Language embedded in Scala developed at UC Berkeley
phanrahan/Magma - A Hardware Description Language embedded in Python
llvm/circt - Intermediate representation for rtl (used by Chisel)
myhdl/MyHDL - Python as a Hardware Description and Verification Language
clash-lang/clash-compiler - A Hardware Description Language written and inspired by Haskell
A much more detailed and specific list for hardware description languages can be found at drom/awesome-hdl.
gtkwave - GTK based waveform viewer
wavedrom/wavedrom - Timing Diagrams in Java Script
steveicarus/iverilog - Icarus Verilog Simulator
ghdl/ghdl - VHDL Simulator
YosysHQ/yosys - Synthesis Flow
abk-openroad/OpenSTA - static timing analysis
OpenTimer/OpenTimer - timing analysis tool for vlsi systems
YosysHQ/SymbiYosys - formal verification flow and tool
cocotb/cocotb - Creating Verilog/VHDL testbenches with python
leviathanch/libresiliconprocess - A 1um open process specification
google/skywater-pdk - Open Source Process SkyWater 130nm
heitzmann/gdspy - manipulating GDSII files in Python
unihd-cag/skillbridge - A seamless python to Cadence Virtuoso Skill interface
electronics-and-drives/SPAM - SPAM is a package management system for Cadence SKILL
electronics-and-drives/ml2tikz - Virtuoso layout to tikzpicture
MatthewLoveQUB/SKILL_Tools - Skill++ Tools including a test framework
EDDRSoftware/oaFileParser - oaFile Parser
scikit-rf/scikit-rf - RF and Microwave Design in scikit
mph-/lcapy - Lcapy is a Python package for linear circuit analysis. It uses SymPy for symbolic mathematics.
YosysHQ/PADRING - A padring generator for asics
DegateCommunity/Degate - Tool for VLSI reverse engineering
cap1tan/wafermap - A python package to plot maps of semiconductor wafers
ucb-art/BAG_framework - Berkeley Analog Generator
VLSIDA/OpenRAM - open-source SRAM Compiler
KLayout/klayout - scriptable Layout Viewer and Editor
ngspice - Spice Simulator
FabriceSalvaire/pyspice - Simulating and creating Spice Circuits with Python
Isotel/mixedsim - A mixed signal simulation approach using ngspice and yosys providing a library mapping to spice
SchemDraw - producing circuit diagrams with python
