Optional project for Computer Architecture (2021).
It's an 8-line cache memory simulator, written in Java, represented as a matrix in console.
It only operates with memory addresses and determines access times, hit/miss rates and how it stores information within the cache. Memory data is not coded for operations, so it's not involved.
Writing policy is Write-back. Word, block and set sizes are configurable, as well as the replacement policies to use: FIFO or LRU.
Have fun testing! :3