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CS303-Logic-and-Digital-System-Design

HW 1) 2-bit input digital multiplier with exactly 1 3-bit adder and appropriate number of 2-input AND gates

HW2) 3-bit input octal to seven segment decoder with composed of AND, OR and INV gates.

HW3) Constructed a 3-to-8 decoder using two 2-to-4 demultiplexers and an inverter, an 8-to-1 MUX using 2-to-1 mutiplexers, F(x, y, z) = P(0, 1, 4, 5, 7) using a 3-to-8 decoder and the minimum number of 2-input OR/NOR gates, a full adder using two 4-to-1 MUXes.

LAB1) An adder that performs adding operation between a 2-bit number and a 2-bit number multiplied by 2.

LAB2) 4-bit “binary to gray code converter”

LAB3) A BCD Counter

LAB4) A Tally Counter

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