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tests/mtd_spi_nor: Update to new pseudomodules
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@crasbe
crasbe committed Apr 30, 2024
1 parent c0d4ea7 commit c2ca283
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4 changes: 2 additions & 2 deletions tests/drivers/mtd_spi_nor/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ include ../Makefile.drivers_common
USEMODULE += embunit
USEMODULE += mtd_spi_nor

CFLAGS += -DTHREAD_STACKSIZE_MAIN=4096
CFLAGS += -DISR_STACKSIZE=2048
#CFLAGS += -DTHREAD_STACKSIZE_MAIN=2048
#CFLAGS += -DISR_STACKSIZE=1024

include $(RIOTBASE)/Makefile.include
35 changes: 29 additions & 6 deletions tests/drivers/mtd_spi_nor/README.md
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Original file line number Diff line number Diff line change
Expand Up @@ -16,25 +16,48 @@ To run the test you simply have to compile and run the test:
```
make flash term
```
The tests should conclude with "OK (3 tests)".

The tests should conclude with "OK (4 tests)".
To enable the security features of the built-in flash, the "MTD_SPI_NOR_MX_SECURITY"
pseudomodule can be added to the make call:
```
USEMODULE+=mtd_spi_nor_mx_security make flash term
```

## nRF52840DK with different flash chips
Likewise, the tests should conclude with "OK (3 tests)".

The default SPI Device for using different Flash chips is SPI(0), which is present on
## nRF52840DK with different flash chips
The default SPI Device for using different Flash chips is SPI(1), which is present on
the Arduino Uno style headers. The default pin for Chip Select is P1.5. The SPI Device and
Chip Select pin can be changed with CFLAGS:
Chip Select pin can be changed with the CFLAGS FLASH_SPI_DEV and FLASH_SPI_CS:
```
CFLAGS+="-DFLASH_SPI_DEV=1 -DFLASH_SPI_CS='GPIO_PIN(1,5)'" make flash term
CFLAGS+="-DFLASH_SPI_DEV=1 -DFLASH_SPI_CS='GPIO_PIN(1,5)'" ...
```

The Device under Test can be changed with CFLAGS as well:
```
CFLAGS+="-DTEST_MX25F12873F" make flash term
... CFLAGS+="-DTEST_IS25LE01G" ...
```

If the Flash supports the security features, they can be enabled with the usage of a
pseudomodule as well:
```
... USEMODULE+=mtd_spi_nor_issi_security ...
```

A full test call would therefore be for example:
```
CFLAGS+="-DFLASH_SPI_DEV=1 -DFLASH_SPI_CS='GPIO_PIN(1,5)'" CFLAGS+="-DTEST_IS25LE01G" \
USEMODULE+=mtd_spi_nor_issi_security make flash test
```

# Tested/Supported Chips

## ISSI

- IS25LP128 (no security features)
- IS25LE01G

## Macronix

- M25F6435F (built-in on nRF52840DK)
Expand Down
97 changes: 86 additions & 11 deletions tests/drivers/mtd_spi_nor/flash_dut.c
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Original file line number Diff line number Diff line change
Expand Up @@ -17,26 +17,101 @@
#include "timex.h"
#include "mtd_spi_nor.h"

#ifdef TEST_MX25L12873F
// The default CS pin and SPI device is for the built-in flash of the nRF52840DK
#ifndef FLASH_SPI_CS
#define FLASH_SPI_CS GPIO_PIN(0, 17)
#endif

#ifndef FLASH_SPI_DEV
#define FLASH_SPI_DEV 0
#endif

#ifdef TEST_IS25LP128

#define IS25LP128_PAGE_SIZE (256)
#define IS25LP128_PAGES_PER_SECTOR (16)
#define IS25LP128_SECTOR_COUNT (4096)
#define IS25LP128_FLAGS (SPI_NOR_F_SECT_4K | SPI_NOR_F_SECT_32K | \
SPI_NOR_F_SECT_64K)
#define IS25LP128_SPI_CLK SPI_CLK_100KHZ
#define IS25LP128_SPI_MODE SPI_MODE_0

static const mtd_spi_nor_params_t _is25lp128_flash_nor_params = {
.opcode = &mtd_spi_nor_opcode_default,
.wait_chip_erase = 50LU * US_PER_SEC,
.wait_32k_erase = 240LU *US_PER_MS,
.wait_sector_erase = 40LU * US_PER_MS,
.wait_chip_wake_up = 35LU * US_PER_MS,
.clk = IS25LP128_SPI_CLK,
.flag = IS25LP128_FLAGS,
.spi = SPI_DEV(FLASH_SPI_DEV),
.mode = IS25LP128_SPI_MODE,
.cs = FLASH_SPI_CS,
.wp = GPIO_UNDEF,
.hold = GPIO_UNDEF,
};

static mtd_spi_nor_t _is25lp128_nor_dev = {
.base = {
.driver = &mtd_spi_nor_driver,
.page_size = IS25LP128_PAGE_SIZE,
.pages_per_sector = IS25LP128_PAGES_PER_SECTOR,
.sector_count = IS25LP128_SECTOR_COUNT,
},
.params = &_is25lp128_flash_nor_params,
};

MTD_XFA_ADD(_is25lp128_nor_dev, 10);

#elif defined TEST_IS25LE01G

#define IS25LE01G_PAGE_SIZE (256)
#define IS25LE01G_PAGES_PER_SECTOR (16)
#define IS25LE01G_SECTOR_COUNT (32768)
#define IS25LE01G_FLAGS (SPI_NOR_F_SECT_4K | SPI_NOR_F_SECT_32K | \
SPI_NOR_F_SECT_64K)
#define IS25LE01G_SPI_CLK SPI_CLK_10MHZ
#define IS25LE01G_SPI_MODE SPI_MODE_0

static const mtd_spi_nor_params_t _is25le01g_flash_nor_params = {
.opcode = &mtd_spi_nor_opcode_default,
.wait_chip_erase = 50LU * US_PER_SEC,
.wait_32k_erase = 240LU *US_PER_MS,
.wait_sector_erase = 40LU * US_PER_MS,
.wait_chip_wake_up = 35LU * US_PER_MS,
.clk = IS25LE01G_SPI_CLK,
.flag = IS25LE01G_FLAGS,
.spi = SPI_DEV(FLASH_SPI_DEV),
.mode = IS25LE01G_SPI_MODE,
.cs = FLASH_SPI_CS,
.wp = GPIO_UNDEF,
.hold = GPIO_UNDEF,
};

static mtd_spi_nor_t _is25le01g_nor_dev = {
.base = {
.driver = &mtd_spi_nor_driver,
.page_size = IS25LE01G_PAGE_SIZE,
.pages_per_sector = IS25LE01G_PAGES_PER_SECTOR,
.sector_count = IS25LE01G_SECTOR_COUNT,
},
.params = &_is25le01g_flash_nor_params,
};

MTD_XFA_ADD(_is25le01g_nor_dev, 10);

#elif defined TEST_MX25L12873F

#define MX25L12873F_PAGE_SIZE (256)
#define MX25L12873F_PAGES_PER_SECTOR (16)
#define MX25L12873F_SECTOR_COUNT (4096)
#define MX25L12873F_FLAGS (SPI_NOR_F_SECT_4K | SPI_NOR_F_SECT_32K | \
SPI_NOR_F_SECT_64K | SPI_NOR_F_MX_SECUR)
SPI_NOR_F_SECT_64K)
#define MX25L12873F_SPI_CLK SPI_CLK_10MHZ
#define MX25L12873F_SPI_MODE SPI_MODE_0

#ifndef FLASH_SPI_CS
#define FLASH_SPI_CS GPIO_PIN(1, 5)
#endif

#ifndef FLASH_SPI_DEV
#define FLASH_SPI_DEV 0
#endif

static const mtd_spi_nor_params_t _mx25l12873f_flash_nor_params = {
.opcode = &mtd_spi_nor_opcode_macronix,
.opcode = &mtd_spi_nor_opcode_default,
.wait_chip_erase = 50LU * US_PER_SEC,
.wait_32k_erase = 240LU *US_PER_MS,
.wait_sector_erase = 40LU * US_PER_MS,
Expand Down
67 changes: 40 additions & 27 deletions tests/drivers/mtd_spi_nor/main.c
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Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,7 @@ static inline spi_t _get_spi(const mtd_spi_nor_t *dev)
// This function was copied from drivers/mtd_spi_nor/mtd_spi_nor.c
static void mtd_spi_cmd(const mtd_spi_nor_t *dev, uint8_t opcode)
{
if (IS_ACTIVE(TRACE)) {
if (IS_ACTIVE(ENABLE_TRACE)) {
TRACE("mtd_spi_cmd: %p, %02x\n",
(void *)dev, (unsigned int)opcode);
}
Expand All @@ -51,7 +51,7 @@ static void mtd_spi_cmd(const mtd_spi_nor_t *dev, uint8_t opcode)
// This function was copied from drivers/mtd_spi_nor/mtd_spi_nor.c
static void mtd_spi_cmd_read(const mtd_spi_nor_t *dev, uint8_t opcode, void *dest, uint32_t count)
{
if (IS_ACTIVE(TRACE)) {
if (IS_ACTIVE(ENABLE_TRACE)) {
TRACE("mtd_spi_cmd_read: %p, %02x, %p, %" PRIu32 "\n",
(void *)dev, (unsigned int)opcode, dest, count);
}
Expand All @@ -62,7 +62,7 @@ static void mtd_spi_cmd_read(const mtd_spi_nor_t *dev, uint8_t opcode, void *des
static void mtd_spi_cmd_write(const mtd_spi_nor_t *dev, uint8_t opcode,
const void *src, uint32_t count)
{
if (IS_ACTIVE(TRACE)) {
if (IS_ACTIVE(ENABLE_TRACE)) {
TRACE("mtd_spi_cmd_write: %p, %02x, %p, %" PRIu32 "\n",
(void *)dev, (unsigned int)opcode, src, count);
}
Expand All @@ -77,7 +77,7 @@ static inline void wait_for_write_enable_set(const mtd_spi_nor_t *dev)
uint8_t status;
mtd_spi_cmd_read(dev, dev->params->opcode->rdsr, &status, sizeof(status));

if (IS_ACTIVE(TRACE)) {
if (IS_ACTIVE(ENABLE_TRACE)) {
TRACE("mtd_spi_nor: wait device status = 0x%02x, waiting WEL-Flag\n",
(unsigned int)status);
}
Expand Down Expand Up @@ -115,28 +115,44 @@ static void test_mtd_init(void)

int ret = mtd_init(TEST_MTD);
TEST_ASSERT_EQUAL_INT(0, ret);
}

static void test_mtd_erase(void)
{
DEBUG("test_mtd_erase: Erasing the first sector\n");
// make sure the Block Protect bits are not set before we start the tests
mtd_spi_nor_t *dev = (mtd_spi_nor_t *)TEST_MTD;

int ret = mtd_erase(TEST_MTD, 0, TEST_MTD->page_size*TEST_MTD->pages_per_sector);
TEST_ASSERT_EQUAL_INT(0, ret);
}
uint8_t status_reg;
const uint8_t bp_flags = SPI_NOR_STATUS_BP0 | SPI_NOR_STATUS_BP1 | \
SPI_NOR_STATUS_BP2 | SPI_NOR_STATUS_BP3;

static void test_mtd_blank(void)
{
return;
mtd_init(TEST_MTD);

DEBUG("test_mtd_blank: Blank Testing the Device... (this may take a while)\n");
// Revert everything back to the original state
mtd_spi_acquire(dev);

int ret = 0;
uint32_t page_count = TEST_MTD->pages_per_sector * TEST_MTD->sector_count;
// Send WREN command to write to the Status Register
mtd_spi_cmd(dev, dev->params->opcode->wren);
wait_for_write_enable_set(dev);

// Mask the status bits and Block Protection Flags
status_reg &= !(SPI_NOR_STATUS_WEL | SPI_NOR_STATUS_WIP);
status_reg &= !bp_flags;

mtd_spi_cmd_write(dev, 0x01, &status_reg, sizeof(status_reg)); // Opcode: WRSR
busy_wait_us(15000); // writing the SR can take up to 15ms
mtd_spi_release(dev);
}

static void test_mtd_erase(void)
{
DEBUG("test_mtd_erase: Erasing the first sector\n");

const uint32_t sector_size = TEST_MTD->page_size*TEST_MTD->pages_per_sector;
uint8_t buffer[TEST_MTD->page_size];

for (uint32_t page = 0; page < page_count; page++) {
int ret = mtd_erase(TEST_MTD, 0, sector_size);
TEST_ASSERT_EQUAL_INT(0, ret);

// read back the sector and check that it is blank
for (uint32_t page = 0; page < TEST_MTD->pages_per_sector; page++) {
ret = mtd_read_page(TEST_MTD, buffer, page, 0, TEST_MTD->page_size);
TEST_ASSERT_EQUAL_INT(0, ret);

Expand All @@ -158,7 +174,7 @@ static void test_mtd_block_protect(void)
uint8_t status_reg;
mtd_spi_nor_t *dev = (mtd_spi_nor_t *)TEST_MTD;

if (!(dev->params->flag & SPI_NOR_F_MX_SECUR || dev->params->flag & SPI_NOR_F_ISSI_SECUR)) {
if (!(IS_USED(MODULE_MTD_SPI_NOR_MX_SECURITY) || IS_USED(MODULE_MTD_SPI_NOR_ISSI_SECURITY))) {
DEBUG("test_mtd_block_protect: No security features enabled, skip test.\n");
return;
}
Expand Down Expand Up @@ -188,17 +204,12 @@ static void test_mtd_block_protect(void)
// protect all blocks
status_reg |= bp_flags;
mtd_spi_cmd_write(dev, 0x01, &status_reg, sizeof(status_reg)); // Opcode WRSR
busy_wait_us(15000); // writing the SR can take up to 15ms

busy_wait_us(500);

// check that the Block Protection was set
// confirm that the Block Protection was actually set
mtd_spi_cmd_read(dev, dev->params->opcode->rdsr, &status_reg, sizeof(status_reg));
TEST_ASSERT_EQUAL_INT(bp_flags, status_reg & bp_flags);

mtd_spi_cmd(dev, dev->params->opcode->wren);
wait_for_write_enable_set(dev);
busy_wait_us(50000);

mtd_spi_release(dev);

// Perform a write test to check if the P_FAIL flag is correctly handled
Expand All @@ -221,6 +232,7 @@ static void test_mtd_block_protect(void)
status_reg &= !bp_flags;

mtd_spi_cmd_write(dev, 0x01, &status_reg, sizeof(status_reg)); // Opcode: WRSR
busy_wait_us(15000); // writing the SR can take up to 15ms
mtd_spi_release(dev);
}

Expand All @@ -229,7 +241,6 @@ Test *tests_mtd_spi_nor_tests(void)
EMB_UNIT_TESTFIXTURES(fixtures) {
new_TestFixture(test_mtd_init),
new_TestFixture(test_mtd_erase),
new_TestFixture(test_mtd_blank),

new_TestFixture(test_mtd_block_protect),
};
Expand All @@ -241,6 +252,8 @@ Test *tests_mtd_spi_nor_tests(void)

int main(void)
{
busy_wait_us(1000000);

TESTS_START();
TESTS_RUN(tests_mtd_spi_nor_tests());
TESTS_END();
Expand Down

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