Is there any interface to flush L2 Cache data

[Phantom1003]

Hi, I'm currently doing some benchmarking on XiangShan. I'd like to inquire if the core has the capability of actively invalidating the L2 cache through instructions or control registers.

Thanks.

[Tang-Haojin]

Sorry for the late reply. Currently, there is no such instruction yet.

[LMiaoH]

Hi, I'm currently doing some benchmarking on XiangShan. I'd like to inquire if the core has the capability of actively invalidating the L2 cache through instructions or control registers.

In the Cache Controller of nanhu core, can the CMD_CMO_INV, CMD_CMO_CLEAN, CMD_CMO_FLUSH commands accomplish this operation? Or, in other words, can the Cache Controller be used to flush dirty data to memory? If so, how should it be done?