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Question about SPEC2006 Evaluation in Bi-Weekly Report Dated 20231127 #2511

Answered by cebarobot
Mygithub0N asked this question in Q&A
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  1. 我们使用 Verilator 对整个处理器核仿真(包括L2、L3 Cache),使用DRAMsim3来模拟内存延迟,没有额外特殊的部分了。
  2. 请参考我们此前有关使用 SimPoint 分析 SPEC2006 的报告(视频, 演示文稿)。
  3. 是完整的 Linux 。

[TRANSLATION]

  1. We use Verilator for simulating the entire processor core, including L2 and L3 cache, while employing DRAMsim3 to simulate memory latency. There are no additional specialized components.
  2. Please refer to our previous reports (videos, slides) on using SimPoint to analyze SPEC2006.
  3. This is a complete Linux setup.

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