GitHub - OpenSourceSilicon/32-bit-MIPS-CPU: An implementation of a 32-bit DLX(a derivative of MIPS) architecture based RISC processor in verilog

OpenSourceSilicon / 32-bit-MIPS-CPU Public

An implementation of a 32-bit DLX(a derivative of MIPS) architecture based RISC processor in verilog

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Name		Name	Last commit message	Last commit date
Latest commit History 3 Commits
ADD4PC.v		ADD4PC.v
ALU.v		ALU.v
AdderPCOffset.v		AdderPCOffset.v
BranchMux.v		BranchMux.v
Brancher.v		Brancher.v
Buffer1.v		Buffer1.v
Buffer2.v		Buffer2.v
Buffer3.v		Buffer3.v
Buffer4.v		Buffer4.v
Buffer5.v		Buffer5.v
ControlUnit.v		ControlUnit.v
DataMemoryRAM.v		DataMemoryRAM.v
HazardUnit.v		HazardUnit.v
InstructionMemoryRAM.txt		InstructionMemoryRAM.txt
InstructionMemoryRAM.v		InstructionMemoryRAM.v
LeftShift2.v		LeftShift2.v
MUXA1.v		MUXA1.v
MUXB1.v		MUXB1.v
MUXB2.v		MUXB2.v
MUXDst.v		MUXDst.v
MUXPC.v		MUXPC.v
MUXResult.v		MUXResult.v
NoSignExtend.v		NoSignExtend.v
RegForwardD.v		RegForwardD.v
RegisterFile.v		RegisterFile.v
SignExtend.v		SignExtend.v
testbench_top_cpu.v		testbench_top_cpu.v
top_cpu.v		top_cpu.v