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This project was for a course at TU/e called System Validation. The goal was to create an architecture with parallel components and use formal model checking to evaluate the model. The use case is a simplified EUV wafer stepper from ASML.

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ASML-Wafer Stepper

This project was for a course at TU/e called System Validation. The goal is to create an architecture with parallel components and use formal model checking to evaluate the model. It is strongly advised for students following this course at TU/e to look away now. Any attempt to implement similar mu-calculus formulae or requirements will most definitely be caught and punished.

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This project was for a course at TU/e called System Validation. The goal was to create an architecture with parallel components and use formal model checking to evaluate the model. The use case is a simplified EUV wafer stepper from ASML.

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