Releases: OFS/opae-sdk
opae-sdk-1.3.7-5
OPAE SDK 1.3.7-5 supports Intel® FPGA Programmable Acceleration Card N3000-V Version 1.2 production release. This release includes an improved OPAE FPGA Driver and PACSign Tool support for newer OpenSSL library. This is a custom release.
To access the general Intel Acceleration Stack for Intel FPGA Programmable Acceleration Card N3000 production releases please download from the following site.
opae-sdk-1.3.7-VC
OPAE SDK 1.3.7-VC supports Intel® FPGA Programmable Acceleration Card N3000-V Version 1.2 production release. This is a custom release.
To access the general Intel® FPGA Programmable Acceleration Card N3000 Version 1.1 production release please download from the following site.
https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/intel-fpga-pac-n3000/getting-started.html
opae-sdk-1.4.1
Open Programmable Acceleration Engine (OPAE) 1.4.1 Release Notes
OPAE 1.4.1 release provides SDK and tools that have been incorporated into Fedora to support FPGA kernel driver that is upstreamed to Linux 5.6 kernel as of March 2020. The main features of this release are:
- Basic functionalities including PR (Programmable Region?), PCIe, FME (FPGA Management Engine), and AFU (Accelerator Functional Unit)
- SRIOV, Error Handling, User Clock
The driver can be found here:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/drivers?h=linux-5.6.y
System Compatibility
- Hardware: tightly coupled FPGA products and programmable FPGA acceleration cards for Intel(R) Xeon(R) processors:
o Intel(R) PAC with Arria(R) 10 GX FPGA (PCI ID: 0x09c4) FIM version 1.1.2-1 (1.2 Production) - Operating System: Tested on Fedora 31 with Linux Kernel 5.6
Major Changes from 1.4.0 to 1.4.1
- OPAE git repository layout changes
The opae-sdk repository has been reorganized into five total repositories.
The following table describes the repositories and how they are integrated into opae-sdk.
| Repository | Description | Integration |
|---|---|---|
| opae-sdk | Contains tools built on top of OPAE libraries and/or kernel interfaces. | Master repository. |
| opae-libs | Contains libraries that implement the OPAE APIs. | Added as a git subtree to opae-sdk/opae-libs. |
| opae-legacy | Contains legacy tools designed for Skylake + FPGA platforms. | Added as an external project in CMake. |
| opae-sim | Contains simulation projects like ASE. | Added as an external project in CMake. |
| opae-test | Contains mock framework for unit tests. | Added as an external project in CMake. |
- Removed Safe String module dependency
- Removed pybind11 3rd component from OPAE source repository. pybind11 is now dynamically loaded
- Ported python tools to python3.6
Notes / Known Issues
- This release supports FPGA driver that has been upstreamed to the Linux Kernel 5.6 as of March, 2020. The driver does not support all FPGA features available on Intel(R) PAC with Arria(R) 10 GX FPGA cards or Intel® FPGA Programmable Acceleration Card N3000 cards.
opae-sdk-1.4.0
Open Programmable Acceleration Engine (OPAE) is a software framework for managing and accessing programmable accelerators (FPGAs). Its main parts are:
-
OPAE Software Development Kit (OPAE SDK),
-
OPAE Linux driver for Intel(R) Xeon(R) CPU with Integrated FPGAs and Intel(R) PAC with Arria(R) 10 GX FPGA
-
Basic Building Block (BBB) library for accelerating AFU
development (not part of this release, but pre-release code is
available on GitHub: https://github.com/OPAE/intel-fpga-bbb
OPAE is under active development to extend to more hardware platforms, as well as to build up the software stack with additional abstractions to enable more software developers.
OPAE SDK is a collection of libraries and tools to facilitate the development of software applications and accelerators using OPAE. It provides a library implementing the OPAE C API for presenting a streamlined and easy-to-use interface for software applications to discover, access, and manage FPGA devices and accelerators using the OPAE software stack. The OPAE SDK also includes the AFU Simulation Environment (ASE) for end-to-end simulation of accelerator RTL together with software applications using the OPAE C API.
OPAE's goal is to accelerate FPGA adoption. It is a community effort to simplify the development and deployment of FPGA applications, so we explicitly welcome discussions and contributions! The OPAE SDK source, unless otherwise noted, is released under a BSD 3-clause license.
More information about OPAE can be found
at http://01.org/OPAE.
Open Programmable Acceleration Engine (OPAE) 1.4.0 Release Notes
This document provides the Release Notes for the Open Programmable
Acceleration Engine (OPAE) 1.4.0 release.
System Compatibility
-
Hardware: tightly coupled FPGA products and programmable FPGA
acceleration cards for Intel(R) Xeon(R) processors:- Intel(R) PAC with Arria(R) 10 GX FPGA (PCI ID: 0x09c4) FIM version 1.1.2-1 (1.2 Production)
- Intel(R) Xeon with Integrated FPGA (PCI ID: 0xbcc0) FIM version 6.4.0
- Intel® FPGA Programmable Acceleration Card N3000 (PCI ID: 0x0b30) FIM version D.1.0.13 (1.0 Production)
-
Operating System: Tested on RedHat 7.6, CentOS 7.6 with Linux Kernel 3.10 and the community 4.19 LTS kernels.
Major Changes from 1.3.0 to 1.4.0
-
Added support to FPGA Linux kernel Device Feature List (DFL) driver patch set2.
-
Added test cases and Increased test coverage
-
Various bug fixes
-
Various memory leak fixes
-
Various Static code scan bug fixes
-
Added new FPGA MMIO API to write 512 bits
-
OPAE 1.4.0 may not be compatible with other versions of Linux OS/Kernel
-
OPAE & Intel FPGA driver are tested on Intel Programmable Acceleration Card Arria 10 GX FPGA & Intel PAC N3000.
-
OPAE & DFL FPGA driver are tested on Intel Programmable Acceleration Card Arria 10 GX FPGA.
-
FPGA DFL Linux driver source code patchset2 available in Linux 5.4 kernel
Notes / Known Issues
-
In addition to supporting the OPAE driver bundled with OPAE SDK releases, the OPAE SDK libraries now
support the FPGA driver that has been upstreamed to the Linux Kernel 5.4.
For more details on this, please see the OPAE documentation related to this. -
DFL FPGA driver patchset2 doesn’t support all the features supported by Intel FPGA driver.
-
FPGAInfo tool doesn’t clear injected error.
-
Partial reconfiguration with SR-IOV
-
If using OPAE in a virtualized environment with SR-IOV enabled, we recommend disabling SR-IOV before performing partial reconfiguration. See "Partial Reconfiguration" in the "OPAE Intel FPGA Linux Device Driver Architecture" document for more information
-
Driver may not display explicit incompatibility message if loaded on mismatched FIM version
When trying to insert the Linux kernel driver modules while an FPGA platform with an unsupported FIM version is present in the system, the driver may fail to load and/or fail to print an explicit incompatibility warning message in the system log. Please make sure to use the driver only with a compatible FIM.
-
ASE: Multiple ModelSim simulator instances may crash when run on the same host
When trying to run multiple instances of the ModelSim simulator on a single system, the simulator may crash. Only run one instance of ModelSim at the same time per system.
opae-sdk-1.3.6-VC
OPAE SDK 1.3.6-VC supports Intel® FPGA Programmable Acceleration Card N3000 Version 1.1 production release.
The package includes the same OPAE SW components that are publicly available on Intel Acceleration Download site.
https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/intel-fpga-pac-n3000/getting-started.html
Intel® FPGA Programmable Acceleration Card N3000 Version 1.1 documents including User Guide and Production Release Notes are available here:
https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/intel-fpga-pac-n3000/documentation.html
opae-sdk-1.3.0
Open Programmable Acceleration Engine (OPAE) is a software framework for managing and accessing programmable accelerators (FPGAs). Its main parts are:
-
OPAE Software Development Kit (OPAE SDK),
-
OPAE Linux driver for Intel(R) Xeon(R) CPU with Integrated FPGAs and Intel(R) PAC with Arria(R) 10 GX FPGA
-
Basic Building Block (BBB) library for accelerating AFU
development (not part of this release, but pre-release code is
available on GitHub: https://github.com/OPAE/intel-fpga-bbb
OPAE is under active development to extend to more hardware platforms, as well as to build up the software stack with additional abstractions to enable more software developers.
OPAE SDK is a collection of libraries and tools to facilitate the development of software applications and accelerators using OPAE. It provides a library implementing the OPAE C API for presenting a streamlined and easy-to-use interface for software applications to discover, access, and manage FPGA devices and accelerators using the OPAE software stack. The OPAE SDK also includes the AFU Simulation Environment (ASE) for end-to-end simulation of accelerator RTL together with software applications using the OPAE C API.
OPAE's goal is to accelerate FPGA adoption. It is a community effort to simplify the development and deployment of FPGA applications, so we explicitly welcome discussions and contributions! The OPAE SDK source, unless otherwise noted, is released under a BSD 3-clause license.
More information about OPAE can be found
at http://01.org/OPAE.
Open Programmable Acceleration Engine (OPAE) 1.3.0 Release Notes
This document provides the Release Notes for the Open Programmable
Acceleration Engine (OPAE) 1.3.0 release.
System Compatibility
-
Hardware: tightly coupled FPGA products and programmable FPGA
acceleration cards for Intel(R) Xeon(R) processors:- Intel(R) PAC with Arria(R) 10 GX FPGA (PCI ID: 0x09c4) FIM version 1.0.3 (1.0 Production)
- Intel(R) Xeon with Integrated FPGA (PCI ID: 0xbcc0) FIM version 6.4.0
-
Operating System: tested on Red Hat Enterprise Linux 7.3 and 7.4, Ubuntu 16.04,
SUSE SLE 12 SP3 and CentOS 7.4, with Linux kernels 3.10 through 4.7
Major Changes from 1.2.0 to 1.3.0
- Updated python requests package used by Sphinx
- Updated fpgad to enumerate for supported devices discarding the previous assumption that it is running on a dual-socket integrated FPGA platform
- Added Python version of fpgamux
- Added deprecation notice for legacy C++ API
- Updated default installation location for packages generated through CMake to "/usr" instead of "/usr/local"
- Added support to FPGA Linux kernel Device Feature List (DFL) driver patch set 1. (see Notes below for more information)
- Increased test cases and test coverage
- Cleaned up dead/legacy code
- Various bug fixes
- Various compiler warning fixes
- Various memory leak fixes
Notes / Known Issues
-
libopaec++ is being deprecated in favor of the official OPAE C++ API.
While no tools in the OPAE codebase use libopaec++, the code is being kept here
for any other tools that may use it outside of the OPAE repository.
This directory, however, will be removed in future versions of OPAE.
For more information and reference on the official API, see the
documentation. -
fpgamux has been ported to use the OPAE Python API.
-
In addition to supporting the OPAE driver bundled with OPAE SDK releases, the OPAE SDK libraries now
support the FPGA driver that has been upstreamed to the Linux Kernel 4.18.
For more details on this, please see the OPAE documentation related to this. -
Seldom in stress tests, kernel panic may be encountered in kernel version 3.10. Preliminary debug information seems to indicate it may be related to hugepage support in the Linux kernel.
-
The current Python distributions included in this release are
- opae.fpga-1.3.0.tar.gz - The source files for building the Python bindings. This requires OPAE development package to be installed prior to building
- opae.fpga-1.3.0-cp27-cp27mu-linux_x86_64.whl - A binary package built with Python 2.7
- opae.fpga-1.3.0-cp35-cp35m-linux_x86_64.whl - A binary package built with Python 3.5
-
A different OPN is used in the design examples
The Intel Quartus Prime Pro Edition license uses a design example
OPN of 10AX115N3F40E2SG, instead of the Intel PAC with Intel Arria
10 GX FPGA OPN of 10AX115N2F40E2LG. This difference does not impact
your design. -
PCIe directed speed changes are not supported
Only automatic down-training at boot time is supported
-
Virtual Function (VF) may fail to attach or detach when using the
Linux Red Hat 3.10 kernelThis is a known issue with qemu/kvm and libvirt. Refer to the Red
Hat website for more information about this issue. -
The Intel FPGA Dynamic Profiler Tool for OpenCL GUI reports
frequency and bandwidth incorrectlyThis issue will be resolved in a future version of the Intel
Acceleration Stack. -
Partial reconfiguration with SR-IOV
If using OPAE in a virtualized environment with SR-IOV enabled, we recommend disabling SR-IOV before performing partial reconfiguration. See "Partial Reconfiguration" in the "OPAE Intel FPGA Linux Device Driver Architecture" document for more information
-
fpgaAssignToInterface() and fpgaReleaseFromInterface() not supported
The OPAE C API provides functions to assign individual AFCs to host interfaces (i.e. a virtual or physical function). Due to the internal implementation of fpga_token, these functions are not yet supported. Instead, we provide a simplified call fpgaAssignPortToInterface() that can assign a port by number to either the physical function (PF) or virtual function (VF). This function will eventually be replaced by the more generic implementation of fpgaAssignToInterface() and fpgaReleaseFromInterface() in a future release.
-
AP6 condition may prevent clearing of port errors
If the system encounters an AP6 condition (exceeded power or temperature threshold), it will report a port error. These errors can only be cleared (e.g. using fpgainfo) after the AP6 condition has been removed.
-
Driver may not display explicit incompatibility message if loaded on mismatched FIM version
When trying to insert the Linux kernel driver modules while an FPGA platform with an unsupported FIM version is present in the system, the driver may fail to load and/or fail to print an explicit incompatibility warning message in the system log. Please make sure to use the driver only with a compatible FIM.
-
ASE: Multiple ModelSim simulator instances may crash when run on the same host
When trying to run multiple instances of the ModelSim simulator on a single system, the simulator may crash. Only run one instance of ModelSim at the same time per system.
opae-sdk-1.2.0
Open Programmable Acceleration Engine (OPAE) is a software framework for managing and accessing programmable accelerators (FPGAs). Its main parts are:
-
OPAE Software Development Kit (OPAE SDK),
-
OPAE Linux driver for Intel(R) Xeon(R) CPU with Integrated FPGAs and Intel(R) PAC with Arria(R) 10 GX FPGA
-
Basic Building Block (BBB) library for accelerating AFU
development (not part of this release, but pre-release code is
available on GitHub: https://github.com/OPAE/intel-fpga-bbb
OPAE is under active development to extend to more hardware platforms, as well as to build up the software stack with additional abstractions to enable more software developers.
OPAE SDK is a collection of libraries and tools to facilitate the development of software applications and accelerators using OPAE. It provides a library implementing the OPAE C API for presenting a streamlined and easy-to-use interface for software applications to discover, access, and manage FPGA devices and accelerators using the OPAE software stack. The OPAE SDK also includes the AFU Simulation Environment (ASE) for end-to-end simulation of accelerator RTL together with software applications using the OPAE C API.
OPAE's goal is to accelerate FPGA adoption. It is a community effort to simplify the development and deployment of FPGA applications, so we explicitly welcome discussions and contributions! The OPAE SDK source, unless otherwise noted, is released under a BSD 3-clause license.
More information about OPAE can be found
at http://01.org/OPAE.
Open Programmable Acceleration Engine (OPAE) 1.2.0 Release Notes
This document provides the Release Notes for the Open Programmable
Acceleration Engine (OPAE) 1.2.0 release.
System Compatibility
-
Hardware: tightly coupled FPGA products and programmable FPGA
acceleration cards for Intel(R) Xeon(R) processors:- Intel(R) PAC with Arria(R) 10 GX FPGA (PCI ID: 0x09c4) FIM version 1.0.3 (1.0 Production)
- Intel(R) Xeon with Integrated FPGA (PCI ID: 0xbcc0) FIM version 6.4.0
-
Operating System: tested on Red Hat Enterprise Linux 7.3 and 7.4, Ubuntu 16.04,
SUSE SLE 12 SP3 and CentOS 7.4, with Linux kernels 3.10 through 4.7
Major Changes from 1.1.0 to 1.2.0
- Added Bus support for dma test
- Implemented secure version of scanf in ase
- Ported fpgainfo to C
- Code refactoring and cleanup for ASE client
- Enabled bus support for hello_events.c
- Improved support for platform interface ports that are vectors
- Updated pybind11 version to 2.2.4
- Defined and implemented plugin architecture
- Restructured testing infrastructure
- Added unit tests for tools
- Defined and implemented Metrics API
- Added Python version for fpgadiag
- Implemented Python distributions to be generated for pyfpgadiag, pypackager and pyfpgaflash
- Defined and implemented SysObject API
- Increased test coverage
- Cleaned up dead/legacy code
- Various bug fixes
- Various memory leak fixes
Notes / Known Issues
-
OPAE is transitioning to a plugin-centric model. What was the opae-c library in
prior releases now exists as a local plugin, named xfpga. The new opae-c library
is an API shell that discovers and utilizes plugins. This enables supporting multiple platforms simultaneously through dynamic discovery and loading of plugins. For more information, refer
to the plugin developer's guide. -
Metrics API / fpgainfo tool require latest FIM and drivers for PAC platforms
-
fpgadiag has also been ported to use the supported OPAE C++ API (in addition to Python version).
fpgamux has not been ported but will be ported in a future release.
The C++ library previously used will be deprecated. -
Any SysObject names used with the SysObject API are driver specific and may not be compatible accross plugins and/or drivers.
-
Seldom in stress tests, kernel panic may be encountered in kernel version 3.10. Preliminary debug information seems to indicate it may be related to hugepage support in the Linux kernel.
-
A different OPN is used in the design examples
The Intel Quartus Prime Pro Edition license uses a design example
OPN of 10AX115N3F40E2SG, instead of the Intel PAC with Intel Arria
10 GX FPGA OPN of 10AX115N2F40E2LG. This difference does not impact
your design. -
PCIe directed speed changes are not supported
Only automatic down-training at boot time is supported
-
Virtual Function (VF) may fail to attach or detach when using the
Linux Red Hat 3.10 kernelThis is a known issue with qemu/kvm and libvirt. Refer to the Red
Hat website for more information about this issue. -
The Intel FPGA Dynamic Profiler Tool for OpenCL GUI reports
frequency and bandwidth incorrectlyThis issue will be resolved in a future version of the Intel
Acceleration Stack. -
Partial reconfiguration with SR-IOV
If using OPAE in a virtualized environment with SR-IOV enabled, we recommend disabling SR-IOV before performing partial reconfiguration. See "Partial Reconfiguration" in the "OPAE Intel FPGA Linux Device Driver Architecture" document for more information
-
fpgaAssignToInterface() and fpgaReleaseFromInterface() not supported
The OPAE C API provides functions to assign individual AFCs to host interfaces (i.e. a virtual or physical function). Due to the internal implementation of fpga_token, these functions are not yet supported. Instead, we provide a simplified call fpgaAssignPortToInterface() that can assign a port by number to either the physical function (PF) or virtual function (VF). This function will eventually be replaced by the more generic implementation of fpgaAssignToInterface() and fpgaReleaseFromInterface() in a future release.
-
AP6 condition may prevent clearing of port errors
If the system encounters an AP6 condition (exceeded power or temperature threshold), it will report a port error. These errors can only be cleared (e.g. using fpgainfo) after the AP6 condition has been removed.
-
Driver may not display explicit incompatibility message if loaded on mismatched FIM version
When trying to insert the Linux kernel driver modules while an FPGA platform with an unsupported FIM version is present in the system, the driver may fail to load and/or fail to print an explicit incompatibility warning message in the system log. Please make sure to use the driver only with a compatible FIM.
-
ASE: Multiple ModelSim simulator instances may crash when run on the same host
When trying to run multiple instances of the ModelSim simulator on a single system, the simulator may crash. Only run one instance of ModelSim at the same time per system.
-
The current Python distributions included in this release are
- opae.fpga-1.2.0.tar.gz - The source files for building the Python bindings. This requires OPAE development package to be installed prior to building
- opae.fpga-1.2.0-cp27-cp27mu-linux_x86_64.whl - A binary package built with Python 2.7
- opae.fpga-1.2.0-cp34-cp34m-linux_x86_64.whl - A binary package built with Python 3.4
- opae.fpga-1.2.0-cp35-cp35m-linux_x86_64.whl - A binary package built with Python 3.5
opae-sdk-1.1.0
Open Programmable Acceleration Engine (OPAE )is a software framework for managing and accessing programmable accelerators (FPGAs). Its main parts are:
-
OPAE Software Development Kit (OPAE SDK),
-
OPAE Linux driver for Intel(R) Xeon(R) CPU with Integrated FPGAs and Intel(R) PAC with Arria(R) 10 GX FPGA
-
Basic Building Block (BBB) library for accelerating AFU
development (not part of this release, but pre-release code is
available on GitHub: https://github.com/OPAE/intel-fpga-bbb
OPAE is under active development to extend to more hardware platforms, as well as to build up the software stack with additional abstractions to enable more software developers.
OPAE SDK is a collection of libraries and tools to facilitate the development of software applications and accelerators using OPAE. It provides a library implementing the OPAE C API for presenting a streamlined and easy-to-use interface for software applications to discover, access, and manage FPGA devices and accelerators using the OPAE software stack. The OPAE SDK also includes the AFU Simulation Environment (ASE) for end-to-end simulation of accelerator RTL together with software applications using the OPAE C API.
OPAE's goal is to accelerate FPGA adoption. It is a community effort to simplify the development and deployment of FPGA applications, so we explicitly welcome discussions and contributions! The OPAE SDK source, unless otherwise noted, is released under a BSD 3-clause license.
More information about OPAE can be found
at http://01.org/OPAE.
Open Programmable Acceleration Engine (OPAE) 1.1.0 Release Notes
This document provides the Release Notes for the Open Programmable
Acceleration Engine (OPAE) 1.1.0 release.
System Compatibility
-
Hardware: tightly coupled FPGA products and programmable FPGA
acceleration cards for Intel(R) Xeon(R) processors (to be released):- Intel(R) PAC with Arria(R) 10 GX FPGA (PCI ID: 0x09c4) FIM version 1.0.3 (1.0 Production)
- Intel(R) Xeon with Integrated FPGA (PCI ID: 0xbcc0) FIM version 6.4.0
-
Operating System: tested on Red Hat Enterprise Linux 7.3, Ubuntu 16.04, SUSE SLE 12 SP3 and CentOS
7.4, with Linux kernels 3.10 through 4.7
Major Changes from 1.0.0 to 1.1.0
- Updated command line options for OPAE tools for a consistent user interface
- Added two new language bindings
- A C++ Core API that is interoperable with the OPAE C API
- A Python API which wraps the C++ Core API object model
- Disabled documentation generation by default in make to speed up development
- Implemented CMake build-chain for ASE
- Organized samples directory
- Increased test coverage
- Added Error API
- Added SUSE support
- Cleaned up dead/legacy code
- Various bug fixes
Notes / Known Issues
-
Seldom in stress tests, kernel panic may be encountered in kernel version 3.10. Preliminary debug information seems to indicate it may be related to hugepage support in the Linux kernel.
-
Memory leak detected by Valgrind points to global data structures used by enumeration routines. This is due to token_cleanup() function not being called when the library is being unloaded. This does not impact memory performance and will be addressed in next release.
-
A different OPN is used in the design examples
The Intel Quartus Prime Pro Edition license uses a design example
OPN of 10AX115N3F40E2SG, instead of the Intel PAC with Intel Arria
10 GX FPGA OPN of 10AX115N2F40E2LG. This difference does not impact
your design. -
PCIe directed speed changes are not supported
Only automatic down-training at boot time is supported
-
Virtual Function (VF) may fail to attach or detach when using the
Linux Red Hat 3.10 kernelThis is a known issue with qemu/kvm and libvirt. Refer to the Red
Hat website for more information about this issue. -
The Intel FPGA Dynamic Profiler Tool for OpenCL GUI reports
frequency and bandwidth incorrectlyThis issue will be resolved in a future version of the Intel
Acceleration Stack. -
Partial reconfiguration with SR-IOV
If using OPAE in a virtualized environment with SR-IOV enabled, we recommend disabling SR-IOV before performing partial reconfiguration. See "Partial Reconfiguration" in the "OPAE Intel FPGA Linux Device Driver Architecture" document for more information
-
fpgaAssignToInterface() and fpgaReleaseFromInterface() not supported
The OPAE C API provides functions to assign individual AFCs to host interfaces (i.e. a virtual or physical function). Due to the internal implementation of fpga_token, these functions are not yet supported. Instead, we provide a simplified call fpgaAssignPortToInterface() that can assign a port by number to either the physical function (PF) or virtual function (VF). This function will eventually be replaced by the more generic implementation of fpgaAssignToInterface() and fpgaReleaseFromInterface() in a future release.
-
AP6 condition may prevent clearing of port errors
If the system encounters an AP6 condition (exceeded power or temperature threshold), it will report a port error. These errors can only be cleared (e.g. using fpgainfo) after the AP6 condition has been removed.
-
Driver may not display explicit incompatibility message if loaded on mismatched FIM version
When trying to insert the Linux kernel driver modules while an FPGA platform with an unsupported FIM version is present in the system, the driver may fail to load and/or fail to print an explicit incompatibility warning message in the system log. Please make sure to use the driver only with a compatible FIM.
-
ASE: Multiple ModelSim simulator instances may crash when run on the same host
When trying to run multiple instances of the ModelSim simulator on a single system, the simulator may crash. Only run one instance of ModelSim at the same time per system.
-
The current Python distributions included in this release are
- opae.fpga-1.1.0.tar.gz - The source files for building the Python bindings. This requires OPAE development package to be installed prior to building
- opae.fpga-1.1.0-cp27-cp27mu-linux_x86_64.whl - A binary package built with Python 2.7
- opae.fpga-1.1.0-cp34-cp34m-linux_x86_64.whl - A binary package built with Python 3.4
- opae.fpga-1.1.0-cp35-cp35m-linux_x86_64.whl - A binary package built with Python 3.5
opae-sdk-1.0.0
The Open Programmable Acceleration Engine is a software framework for managing and accessing programmable accelerators (FPGAs). Its main parts are:
-
The OPAE Software Development Kit (OPAE SDK),
-
the OPAE Linux driver for Intel(R) Xeon(R) CPU with Integrated FPGAs and Intel(R) PAC with Arria(R) 10 GX FPGA
-
the Basic Building Block (BBB) library for accelerating AFU
development (not part of this release, but pre-release code is
available on GitHub: [https://github.com/OPAE/intel-fpga-bbb]
OPAE is under active development to extend to more hardware platforms, as well as to build up the software stack with additional abstractions to enable more software developers.
The OPAE SDK is a collection of libraries and tools to facilitate the development of software applications and accelerators using OPAE. It provides a library implementing the OPAE C API for presenting a streamlined and easy-to-use interface for software applications to discover, access, and manage FPGA devices and accelerators using the OPAE software stack. The OPAE SDK also includes the AFU Simulation Environment (ASE) for end-to-end simulation of accelerator RTL together with software applications using the OPAE C API.
OPAE's goal is to accelerate FPGA adoption. It is a community effort to simplify the development and deployment of FPGA applications, so we explicitly welcome discussions and contributions! The OPAE SDK source, unless otherwise noted, is released under a BSD 3-clause license.
More information about OPAE can be found
at http://01.org/OPAE.
Open Programmable Acceleration Engine (OPAE) 1.0.0 Release Notes
This document provides the Release Notes for the Open Programmable
Acceleration Engine (OPAE) 1.0.0 release.
System Compatibility
-
Hardware: tightly coupled FPGA products and programmable FPGA
acceleration cards for Intel(R) Xeon(R) processors (to be released):- Intel(R) PAC with Arria(R) 10 GX FPGA (PCI ID: 0x09c4) FIM version 1.0.3 (1.0 Production)
- Intel(R) Xeon with Integrated FPGA (PCI ID: 0xbcc0) FIM version 6.4.0
-
Operating System: tested on Red Hat Enterprise Linux 7.3, and CentOS
7.4, with Linux kernels 3.10 through 4.7
Major Changes from 0.13.1 to 1.0.0
- Added API functions to retrieve libopae-c version information
- Added support for vendor ID and device ID properties
- MMIO mappings are now automatically freed on resource close
- Reduced minimum supported clock frequency to 25MHz
- Removed dependency on Boost
- Added support for building debian packages
- Building packages sets the default install location to /usr/local
- Improved error clearing flow in
fpgainfo - Added RAS support for discrete FPGA devices
- Improved test coverage
- Fixed "freq" option for bandwidth calculation in
fpgadiag fpgadiagnow reads pclock frequency from hardware- Improved handling/generation of CCI-P FIFO signals in ASE by providing flexible clock and local memory
- Improved platform support in the platform database
- Enabling ASE platform support for tests
- Improved support for platform database in AFU JSON
- Updated documentation for build chain, packaging(DEB and RPM) and ASE
- Reorganized
toolsdirectory structure - Code cleanup and improved error messages
- Various bug fixes
Notes / Known Issues
-
A different OPN is used in the design examples
The Intel Quartus Prime Pro Edition license uses a design example
OPN of 10AX115N3F40E2SG, instead of the Intel PAC with Intel Arria
10 GX FPGA OPN of 10AX115N2F40E2LG. This difference does not impact
your design. -
PCIe directed speed changes are not supported
Only automatic down-training at boot time is supported
-
Virtual Function (VF) may fail to attach or detach when using the
Linux Red Hat 3.10 kernelThis is a known issue with qemu/kvm and libvirt. Refer to the Red
Hat website for more information about this issue. -
The Intel FPGA Dynamic Profiler Tool for OpenCL GUI reports
frequency and bandwidth incorrectlyThis issue will be resolved in a future version of the Intel
Acceleration Stack. -
fpgainfo may raise a UnicodeEncodeError when the Python
interpreter cannot determine what encoding to useThis issue typically occurs when redirecting or piping output. The
fpgabist tool calls fpgainfo and is also impacted.There are two workarounds for this issue:
-- Set the PYTHONENCODING environment variable to UTF-8.
-- Modify the fpgainfo script to force the use of UTF-8:
-
Add an import codecs statement at the top of the file with the
other import statements. -
Before the line that calls args.func(args), insert this comment and code line:
# wrap stdout with the StreamWriter that does unicode sys.stdout = codecs.getwriter('UTF- 8')(sys.stdout)
-
-
When simulating the hello_intr_afu sample code, the
af2cp_sTxPort.c1.hdr.rsvd2[5:4] has a value of XThis issue will be resolved in the Intel Acceleration Stack 1.1
version. -
Partial reconfiguration with SR-IOV
If using OPAE in a virtualized environment with SR-IOV enabled, we recommend disabling SR-IOV before performing partial reconfiguration. See "Partial Reconfiguration" in the "OPAE Intel FPGA Linux Device Driver Architecture" document for more information
-
fpgaAssignToInterface() and fpgaReleaseFromInterface() not supported
The OPAE C API provides functions to assign individual AFCs to host interfaces (i.e. a virtual or physical function). Due to the internal implementation of fpga_token, these functions are not yet supported. Instead, we provide a simplified call fpgaAssignPortToInterface() that can assign a port by number to either the physical function (PF) or virtual function (VF). This function will eventually be replaced by the more generic implementation of fpgaAssignToInterface() and fpgaReleaseFromInterface() in a future release.
-
hssi_loopback tool help menu lists incorrect option for packet count
The help menu indicates -p is the packet count, however the actual switch is -c.
-
AP6 condition may prevent clearing of port errors
If the system encounters an AP6 condition (exceeded power or temperature threshold), it will report a port error. These errors can only be cleared (e.g. using fpgainfo) after the AP6 condition has been removed.
-
Driver may not display explicit incompatibility message if loaded on mismatched FIM version
When trying to insert the Linux kernel driver modules while an FPGA platform with an unsupported FIM version is present in the system, the driver may fail to load and/or fail to print an explicit incompatibility warning message in the system log. Please make sure to use the driver only with a compatible FIM.
-
ASE: Multiple ModelSim simulator instances may crash when run on the same host
When trying to run multiple instances of the ModelSim simulator on a single system, the simulator may crash. Only run one instance of ModelSim at the same time per system.
opae-sdk-0.13.1
The Open Programmable Acceleration Engine is a software framework for managing and accessing programmable accelerators (FPGAs). Its main parts are:
-
The OPAE Software Development Kit (OPAE SDK),
-
the OPAE Linux driver for Intel(R) Xeon(R) CPU with FPGAs, and
-
the Basic Building Block (BBB) library for accelerating AFU
development (not part of this release, but pre-release code is
available [on GitHub)[https://github.com/OPAE/intel-fpga-bbb\]
OPAE is under active development to extend to more hardware platforms, as well as to build up the software stack with additional abstractions to enable more software developers.
The OPAE SDK is a collection of libraries and tools to facilitate the development of software applications and accelerators using OPAE. It provides a library implementing the OPAE C API for presenting a streamlined and easy-to-use interface for software applications to discover, access, and manage FPGA devices and accelerators using the OPAE software stack. The OPAE SDK also includes the AFU Simulation Environment (ASE) for end-to-end simulation of accelerator RTL together with software applications using the OPAE C API.
OPAE's goal is to accelerate FPGA adoption. It is a community effort to simplify the development and deployment of FPGA applications, so we explicitly welcome discussions and contributions! The OPAE SDK source, unless otherwise noted, is released under a BSD 3-clause license.
More information about OPAE can be found
at [http://01.org/OPAE]{.underline}.
Open Programmable Acceleration Engine (OPAE) 0.13.1 Release Notes
This document provides the Release Notes for the Open Programmable
Acceleration Engine (OPAE) 0.13.1 release.
System Compatibility
-
Hardware: tightly coupled FPGA products and programmable FPGA
acceleration cards for Intel(R) Xeon(R) processors (to be released);
Intel(R) PAC with Arria(R) 10 card -
Operating System: tested on Red Hat Enterprise Linux 7.4, and CentOS
7.4, with Linux kernels 3.10 through 4.7 -
Intel Programmable Acceleration Card (PAC) with Intel Arria® 10 GX FPGA (PCI ID: 0x09c4)
FIM Version : 1.0.3 (1.0 Production)
Major Changes from 0.13.0 to 0.13.1
-
Refactor fpga internals
-
Change object_ID to object_id to be more consistent with other property names
-
Rename `sysfs_resource` to `sysfs_node` class
-
Default log to /tmp + error handling. This changes fpgainfo to log to /tmp directory but also adds exception handling in case the log file can't be opened. If that happens, it will log to stderr
-
-
fpgabist:
- Support identifying target card via "-b", "-d", and/or "-f" flags when multiple cards are present. If there is only one card on the system the tool will default to running on the only available fpga
- Improve input parsing and output formatting
-
Define usage of flags to work with vhdla on ModelSim(use "-F") and
VCS(use "-f"). -
Reduce amount of logging when interrupts are supported by hardware
-
hssi: fix help message for `send` command
Notes / Known Issues
-
A different OPN is used in the design examples
The Intel Quartus Prime Pro Edition license uses a design example
OPN of 10AX115N3F40E2SG, instead of the Intel PAC with Intel Arria
10 GX FPGA OPN of 10AX115N2F40E2LG. This difference does not impact
your design. -
PCIe directed speed changes are not supported
Only automatic down-training at boot time is supported
-
Virtual Function (VF) may fail to attach or detach when using the
Linux Red Hat* 3.10 kernel
This is a known issue with qemu/kvm and libvirt. Refer to the Red
Hat* website for more information about this issue. -
The Intel FPGA Dynamic Profiler Tool for OpenCL* GUI reports
frequency and bandwidth incorrectlyThis issue will be resolved in a future version of the Intel
Acceleration Stack. -
fpgainfo may raise a UnicodeEncodeError when the Python*
interpreter cannot determine what encoding to use
This issue typically occurs when redirecting or piping output. The
fpgabist tool calls fpgainfo and is also impacted.There are two workarounds for this issue:
-
Set the PYTHONENCODING environment variable to UTF-8.
-
Modify the fpgainfo script to force the use of UTF-8:
-- Add an import codecs statement at the top of the file with the
other import statements.-- Before the line that calls args.func(args), insert this comment and code line:
# wrap stdout with the StreamWriter that does unicode
sys.stdout = codecs.getwriter('UTF- 8')(sys.stdout) -
When simulating the hello_intr_afu sample code, the
af2cp_sTxPort.c1.hdr.rsvd2[5:4] has a value of XThis issue will be resolved in the Intel Acceleration Stack 1.1
version.