Releases: NNgen/nngen
Releases · NNgen/nngen
v1.3.4
Update
- Updated the operator traversal method (
collect_numerics) for the faster scheduling. - Sorted the test directory (
tests) for the separated testing. - Support of the variable request buffer depth of AXIM-DMA controllers.
- Bug fix of
read_modify_write. - Bug fix of the stream stop condition (
source_stop->sink_stop) - Bug fix of
..._imm,reduce_...,argmax,argminoperators. - Bug fix of the address map assignment.
The required Veriloggen version is 2.3.0.
Environment
macOS 13.5.2 (Apple Silicon M2 Max)
- Python 3.10.6
- Icarus Verilog 12.0
- Pyverilog 1.3.0
- Veriloggen 2.3.0
- numpy 1.26.0rc1
- onnx 1.14.1
- torch 2.0.1
- torchvision 0.15.2
Ubuntu 20.04.6 (AMD Ryzen 9 5950X)
- Python 3.10.6
- Icarus Verilog 10.3
- Pyverilog 1.3.0
- Veriloggen 2.3.0
- numpy 1.26.0rc1
- onnx 1.14.1
- torch 2.0.1
- torchvision 0.15.2
v1.3.3
Update
- Bug fix of the bit-width calculation of
control_param. - Updated DMA methods in nngen, because the transfer granularity of the DMA methods in veriloggen have been changed in version 2.1.0.
- Renamed
strm.constant-> 'strm.parameter', because of the rename in veriloggen 2.1.0. - Updated and optimized FSMs of some operators, because the DMA methods of veriloggen 2.1.0 are optimized with the support of multiple outstanding requests with request FIFOs.
Environment
macOS 12.3.1 (Apple Silicon M1)
- Python 3.9.11
- Icarus Verilog 11.0
- Pyverilog 1.3.0
- Veriloggen 2.1.0
- numpy 1.22.3
- onnx 1.11.0
- torch 1.11.0
- torchvision 0.12.0
Ubuntu 20.04.2 (AMD Ryzen 9 5950X)
- Python 3.9.11
- Icarus Verilog 10.3
- Pyverilog 1.3.0
- Veriloggen 2.1.0
- numpy 1.22.3
- onnx 1.11.0
- torch 1.11.0
- torchvision 0.12.0
v1.3.2
This NNgen version requires veriloggen 1.8.9, not 1.9.x.
Update
- A bug fix of the on-chip buffer offset calculation in element-wise operators.
- A bug fix of the shape type in the Reshape operator argument.
- A bug fix of the DMA write completion check in various operators. Veriloggen 1.8.9 is required.
Environment
macOS 11.4 (Apple Silicon M1)
- Python 3.9.4
- Icarus Verilog 11.0
- Pyverilog 1.3.0
- Veriloggen 1.8.9
Ubuntu 20.04.2 (AMD Ryzen 9 5950X)
- Python 3.7.7
- Icarus Verilog 10.3
- Pyverilog 1.3.0
- Veriloggen 1.8.9
v1.3.1
This is for Veriloggen 1.8.2, not for Veriloggen 1.9.0.
Update
asymmetric_clipis introduced to change the negative value range in clipping operations.- Clipping behavior for unsigned values is improved.
- Pipeline latency is optimized.
- Interrupt mechanism is implemented.
- Control register configuration is changed.
Test environment
macOS 10.15.7
- Python 3.7.7
- Icarus Verilog 11.0
- Pyverilog 1.3.0
- Veriloggen 1.8.2
Ubuntu 18.04.5
- Python 3.7.7
- Icarus Verilog 10.1
- Pyverilog 1.3.0
- Veriloggen 1.8.2
v1.3.0
Update
- Some operators are newly added for YOLOv3-Tiny.
- Some ONNX operators are newly added for YOLOv3-Tiny.
- scaled_multiply and scaled_div are newly introduced to support ONNX.Mul and ONNX.Div with quantization.
- Some bugs of layout managements in the ONNX importer are fixed.
- New feature named "local_control_params" is introduced to chain streaming operators with configurable parameters.
- Quantizer performance is improved.
Test environment
macOS 10.15.4
- Python 3.7.7
- Icarus Verilog 10.3
- Pyverilog 1.2.1
- Veriloggen 1.8.2
Ubuntu 18.04.4
- Python 3.7.2
- Icarus Verilog 10.1
- Pyverilog 1.2.1
- Veriloggen 1.8.2
v1.2.0
Update
Some critical bugs of ONNX importer are fixed.
Quantization mechanism is improved. 8-bit quantization works well for the included examples.
- Algorithm to determine right-shift amounts in quantization is improved. Quantization speed is enhanced.
- Bug fixes of ONNX importer for Gemm: The weight matrix of a Gemm (matmul) is transposed when its input has a different layout. A bug of Bias/Scale bit-width of Gemm is also fixed.
- A bug fix of ONNX importer for GlobalAveragePool: In the previous version, max_pool is wrongly generated. It has been replaced with avg_pool.
- Examples of VGG-11 and ResNet-18 are improved.
Test environment
macOS 10.15.2
- Python 3.7.5
- Icarus Verilog 10.3
- Pyverilog 1.2.0
- Veriloggen 1.8.1
Ubuntu 18.04.3
- Python 3.6.9
- Icarus Verilog 10.1
- Pyverilog 1.2.0
- Veriloggen 1.8.1
v1.1.2
Update
- Added a Jupyter Notebook example: hello_nngen.ipynb
- Removed README.rst
- Updated the setup scripts
Test environment
macOS 10.15.1
- Python 3.7.5
- Icarus Verilog 10.3
- Pyverilog 1.2.0
- Veriloggen 1.8.0
Ubuntu 18.04.3
- Python 3.6.8
- Icarus Verilog 10.1
- Pyverilog 1.2.0
- Veriloggen 1.8.0
v1.1.1
v1.1
Update
- README: "Getting started" with some important issues are added. Try NNgen!
- Bug fixes of "examples" and "tests"
- Bug fixes of verification methods in ng.verify.
Test environment
macOS 10.15.1
- Python 3.7.5
- Icarus Verilog 10.3
- Pyverilog 1.2.0
- Veriloggen 1.8.0
Ubuntu 18.04.3
- Python 3.6.8
- Icarus Verilog 10.1
- Pyverilog 1.2.0
- Veriloggen 1.8.0