A Clojure library designed for writing RISC-V assembly in clojure
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A crude but functional implementation of a dynamic RISC-V assembler in Clojure, Still in a pre-alpha state, pretty much everything is liable to change.
It currently supports only the 32-bit I and M modules plus the base instructions from the C module and the ZiCSR module including the (proposed?) 32-bit CSR memory map, but has been designed to be extended to support other modules and both 64-bit and 128-bit instruction sets as well.
These are actually the basic modules/packages to be used to build up an assembler for the instruction set of a processor when needed.
All instructions are clojure functions and therefore need to be surrounded by parenthesis
It includes some changes to the standard assembly notation and syntax namely….
- nibble - 4-bit (nibble)
- byte - 8-bit (byte)
- kait - 16-bit (half word)
- vait - 32-bit (word)
- zait - 64-bit (double word)
- yait - 128-bit (quad word) (very likely to change)
Though I will probably use Double and Quad for the floating point module names as the module letters are derived from those.
also sv/lv (store vait/load vait) are of the form….
- (sv rs rb imm) ;; sv source-reg base-reg immediate
- (lv rd rb imm) ;; lv dest-reg base-reg immediate
as are all the other loads and stores (sb,lb, sk/lk, sz/lz).
I personally find it easier to think like this about (modern) assembly code.
Also Register “zero” (x0) is renamed to “zr” to avoid confusion with clojures zero?
function and its test is zr? or z-reg?.
“and”, “or”, “rem”, “not”, “dec” and “inc” are prefixed with “cj-” within the instruction modules so the original words can comply with the RISC-V standard, I feel this convention should be followed when using this library.
FIXME
Copyright © 2022 Kyuvi
This program and the accompanying materials are made available under the terms of the GNU General Public License 3.0 or later which is available at https://www.gnu.org/licenses/gpl-3.0.html with the GNU Classpath Exception which is available at https://www.gnu.org/software/classpath/license.html.
This assembler is based on
- Andy Hefner’s asm-6502, https://ahefner.livejournal.com/20528.html.
- Technoblogy’s RISC-V assembler, http://www.ulisp.com/show?310Z.
Also thanks to
- Andrew Dailey’s Bronzebeard project.