-
Notifications
You must be signed in to change notification settings - Fork 204
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
[NFC] Document intrinsic lowering #2543
base: main
Are you sure you want to change the base?
Conversation
Signed-off-by: Lu, John <john.lu@intel.com>
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Thanks for working on this! I'll post extra comments later. There are 2 cases missing:
- Just mapping on a SPIR-V instruction from either core spec or extension. Q: do we want to mention this case?
- Some emulation done straight in SPIR-V writer, so not intermediate transformation is being done.
General Q: do we want to unify approaches? All of them have pros and cons, for example if we need to do some types adjustments, it's either to do it just during SPIR-V generation as we create module from scratch, on LLVM IR level replacing types is much harder. Also while inserting definitions of intrinsic function overloads is also possible, do we really want to do it in every case as we would need to insert every possible type combination?
Another Q: do we want (and if yes or no - mention it in the document) emulate some intrinsic that are being mapped on OpenCL lib calls or extension instruction in case, if lets say we know, that target device supports only native builtins or doesn't support a particular extension?
Thanks so much for adding this @LU-JOHN I will add my feedback in a bit. Thanks |
lib/SPIRV/Lowering.md
Outdated
BB); | ||
} | ||
|
||
When these ExtInst are reverse translated they are converted to calls: |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Can you please document what happens when reverse translation is called with --spirv-target-env=SPV-IR i.e the user requests SPIR-V friendly IR?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
I've added a little documentation, but this is just duplicating text from the --help option. I do not understand enough to explain why --spirv-target-env=SPV-IR should be used. Perhaps someone else can re-write this seciton.
lib/SPIRV/Lowering.md
Outdated
@@ -0,0 +1,132 @@ | |||
The SPIRV-LLVM-Translator will "lower" some LLVM intrinsic calls to another function or implementation |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Is it possible to document what logic/criteria is used to select between these three options?
Thanks
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
I've added documentation to explain the pros/cons of each approach. The approaches are ordered from best to worst in my opinion.
Signed-off-by: Lu, John <john.lu@intel.com>
Signed-off-by: Lu, John <john.lu@intel.com>
Signed-off-by: Lu, John <john.lu@intel.com>
Signed-off-by: Lu, John <john.lu@intel.com>
I think we do want to simplify the lowering process, but that is a bigger discussion than what this document addresses. I'm only trying to give an overview of what is currently done. |
Moved to docs directory. |
Document how llvm intrinsics are lowered by SPIRV-LLVM-Translator.