An open-source computer
Right now, the system testbench and the assembler can be compiled. Just run the provided Makefiles in their respective directories.
To build the system testbench, you'll need make, Icarus Verilog, and ideally some sort of waveform viewer (like GTKWave). The testbench emulates all of the system's I/O devices, but they aren't connected to anything, so you'll have to read the output waveforms yourself and determine if they're correct or not for debugging. Another thing to pay attention to is the length of time the testbench runs for; running the emulation long enough to catch rare problems might generate VCD files of several hundred megabytes.
To build spasm, you'll need g++, make, and libboost. Everything's been updated for the v5 ISA.
You can use spasm and the system testbench to develop software for the epRISC system. Documentation isn't complete for the new parts of the assembler, but you can use the code in the software/rom/ directory as a starting point. The full list of assembly instructions are in the .cpu file in the software/toolchain/spasm/ directory.
The assembler can generate binaries in big-endian format and Verilog arrays. Run spasm with the -t flag, replace the contents of the array in the firmware/core/rom_v1r0.v file with the output file generated by spasm, and make the system testbench as directed above.
A Quartus project is provided in the firmware/core directory to run the CPU and its peripherals on an Altera MAX 10 FPGA. You should be able, with little modification, to get the project to synthesize to another Altera FPGA or to another manufacturer's FPGA.
As of 04-05-2017, the computer is running successfully on its development board. If you're interested in running the system on your hardware, please contact me.