- 學校 : 陽明交通大學
- 課程 : 積體電路設計實驗 (iclab)
- 修課學期 ：2023 fall (112上)
- 教授 ：李鎮宜
- 大助 ：賴林鴻
- 原始總成績：
100.69(滿分103) - 排名 :
6.3% (8 / 127) - 個人以下14次全部實作，均通過1st demo。
| 項目 | 學習主題 | 名稱 | 1st demo通過率 | 分數 | 效能排名 |
|---|---|---|---|---|---|
| Lab01 | 組合電路計算MOS的電流 / 增益 | Supper MOSFET Calculator | 96% (143/149) | 92.35 | 26% (39/149) |
| Lab02 | 循序電路做梯形渲染 | Calculation on the coordinates | 79% (118/149) | 96.42 | 13% (17/134) |
| Lab03 | 寫Pattern練AXI Lite與SPI簡化版協定 | AXI-SPI DataBridge | 77% (115/149) | 100 | NA |
| Lab04 | 使用DesignWare的浮點數運算IP | Siamese Neural Network | 62% (93/149) | 88.35 | 40% (48/121) |
| Lab05 | 使用Memory Compiler生成SRAM | Matrix convolution, max pooling and transposed convolution | 49% (73/149) | 93.55 | 22% (24/108) |
| Lab06 | 使用自己寫的soft IP | Huffman Code Operation | 76% (113/149) | 96.59 | 12% (15/123) |
| Online Test | 上機考，限時3小時完成 | Train departure problem | 48% (71/149) | 100 | NA |
| Midterm project | 使用AXI與DRAM溝通 | Maze Router Accelerator | 59% (88/149) | 108.17 | 7% (8/114) |
| Lab07 | Clock Domain Crossing (CDC) | Pseudo Random Number Generator (PRNG) | 62% (93/149) | 99.1 | 16% (18/116) |
| Lab08 | 在design內手動clock gating | Low power on Siamese Neural Network | 74% (111/149) | 98.98 | 6% (7/118) |
| Lab09 | SystemVerilog的desgin | Tea house(design) | 78% (116/149) | 97.05 | 11% (13/122) |
| Lab10 | SystemVerilog的驗證 | Tea house(verification) | 81% (120/149) | 99.67 | 4% (5/120) |
| Lab12 | 熟悉APR flow | Matrix convolution, max pooling and transposed convolution(with APR) | 81% (120/149) | 87.56 | 29% (35/121) |
| Final project | 從RTL到APR flow並使用AXI與DRAM溝通 | single core Central Processing Unit | 62% (92/149) | 104.62 | 19% (22/117) |