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IIT Madras
- Chennai
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Hardware-Modeling-using-Verilog
Hardware-Modeling-using-Verilog PublicSolutions to programming assignments of NPTEL course - Hardware Modeling using Verilog
Verilog 3
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Side-Channel-Analysis
Side-Channel-Analysis PublicRepository for various experiments done during Aug'21 to Mar'21 related to Side-channel-analysis of Shakti's AES accelerators
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AES-accelerator-with-PICOrv32
AES-accelerator-with-PICOrv32 PublicEE2003-Final Project: Hardware Accelerator for AES
Verilog 3
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Shakti-Projects
Shakti-Projects PublicProjects done under SHAKTI, India's first indigenously developed and manufactured microprocessor
Bluespec 2
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EE2003-Computer-Organisation
EE2003-Computer-Organisation PublicSolutions to assignments of ee2003
Verilog 2
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