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@GLADICOS

Latin American Group Integrated Circuits Development Open Source

Pinned

  1. AES128 AES128 Public

    AES128 is a IP crypto core using modes ECB/CBC/CTR using vpi to functional verification

    C++ 15 2

  2. UART UART Public

    This project provide the necessary to run a env test a simple uart verilog using SystemC and running it on icarus verilog

    Verilog 6 1

  3. SPACEWIRESYSTEMC SPACEWIRESYSTEMC Public

    This is a test suit spacewire using a model on systemC with a verilog with graphical interface

    PHP 3 1

  4. I2C I2C Public

    A i2C APB CORE MASTER AND SLAVE ASIC IP

    Verilog 4 2

Repositories

Showing 10 of 12 repositories
  • I2C Public

    A i2C APB CORE MASTER AND SLAVE ASIC IP

    Verilog 4 GPL-3.0 2 0 0 Updated Apr 11, 2023
  • AES128 Public

    AES128 is a IP crypto core using modes ECB/CBC/CTR using vpi to functional verification

    C++ 15 LGPL-3.0 2 0 0 Updated Mar 31, 2023
  • APB Public
    0 GPL-3.0 0 0 0 Updated Mar 4, 2023
  • PADS Public

    simple repo for any kind of pads used under verilog / system verilog

    Verilog 1 GPL-3.0 0 0 0 Updated Mar 4, 2023
  • BMAL Public

    Basis Microletronics to Latin America

    0 0 0 0 Updated Sep 27, 2022
  • SPACEWIRESYSTEMC Public

    This is a test suit spacewire using a model on systemC with a verilog with graphical interface

    PHP 3 GPL-3.0 1 3 0 Updated Sep 27, 2022
  • UART Public

    This project provide the necessary to run a env test a simple uart verilog using SystemC and running it on icarus verilog

    Verilog 6 GPL-3.0 1 0 0 Updated Sep 27, 2022
  • APBBRIDGE Public
    0 GPL-3.0 0 0 0 Updated Jan 20, 2017
  • TIMER Public
    0 GPL-3.0 0 0 0 Updated Jan 6, 2017
  • PWM Public
    0 GPL-3.0 0 0 0 Updated Jan 6, 2017
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