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PCB review (#8)
* Delete EnAcess PCB.kicad_sch-bak * Delete Meter hardware design/PCB CAD Design directory * Create CAD * Add files via upload * Delete Meter hardware design/production file directory * Create pro * Add files via upload
1 parent 558fc13 commit 3faed2d

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Meter hardware design/PCB CAD Design/EnAcess PCB.kicad_pcb

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Meter hardware design/PCB CAD Design/EnAcess PCB.kicad_prl

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@@ -1,6 +1,6 @@
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{
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"board": {
3-
"active_layer": 0,
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"active_layer": 37,
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"active_layer_preset": "All Layers",
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"auto_track_width": true,
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"hidden_netclasses": [],
@@ -14,7 +14,6 @@
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"vias": 1.0,
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"zones": 0.6
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},
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"ratsnest_display_mode": 0,
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"selection_filter": {
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"dimensions": true,
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"footprints": true,
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],
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"visible_layers": "fffffff_ffffffff",
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"zone_display_mode": 0

Meter hardware design/PCB CAD Design/EnAcess PCB.kicad_pro

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@@ -63,20 +63,26 @@
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"rule_severities": {
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"annular_width": "error",
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"clearance": "error",
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"connection_width": "warning",
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"copper_edge_clearance": "error",
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"copper_sliver": "warning",
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"courtyards_overlap": "error",
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"diff_pair_gap_out_of_range": "error",
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"diff_pair_uncoupled_length_too_long": "error",
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"drill_out_of_range": "error",
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"duplicate_footprints": "warning",
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"extra_footprint": "warning",
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"footprint": "error",
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"footprint_type_mismatch": "error",
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"hole_clearance": "error",
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"hole_near_hole": "error",
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"invalid_outline": "error",
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"isolated_copper": "warning",
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"item_on_disabled_layer": "error",
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"items_not_allowed": "error",
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"length_out_of_range": "error",
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"lib_footprint_issues": "error",
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"lib_footprint_mismatch": "error",
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"malformed_courtyard": "error",
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"microvia_drill_out_of_range": "error",
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"missing_courtyard": "ignore",
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"padstack": "error",
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"pth_inside_courtyard": "ignore",
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"shorting_items": "error",
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"silk_edge_clearance": "warning",
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"silk_over_copper": "warning",
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"silk_overlap": "ignore",
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"skew_out_of_range": "error",
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"solder_mask_bridge": "error",
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"starved_thermal": "error",
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"text_height": "warning",
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"text_thickness": "warning",
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"through_hole_pad_without_hole": "error",
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"too_many_vias": "error",
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"track_dangling": "ignore",
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"unconnected_items": "error",
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"unresolved_variable": "error",
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"via_dangling": "ignore",
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"zone_has_empty_net": "error",
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"zones_intersect": "error"
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},
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"rules": {
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"allow_blind_buried_vias": false,
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"allow_microvias": false,
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"max_error": 0.005,
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"min_clearance": 0.0,
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"min_connection": 0.0,
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"min_copper_edge_clearance": 0.0,
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"min_hole_clearance": 0.25,
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"min_hole_to_hole": 0.25,
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"drill": 0.0
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}
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],
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"zones_allow_external_fillets": false,
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"zones_use_no_outline": true
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"zones_allow_external_fillets": false
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},
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"layer_presets": [],
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"viewports": []
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"rule_severities": {
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"bus_definition_conflict": "error",
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"bus_entry_needed": "error",
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"bus_label_syntax": "error",
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"bus_to_bus_conflict": "error",
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"bus_to_net_conflict": "error",
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"conflicting_netclasses": "error",
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"different_unit_footprint": "error",
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"different_unit_net": "error",
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"duplicate_reference": "error",
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"duplicate_sheet_names": "error",
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"endpoint_off_grid": "warning",
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"extra_units": "error",
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"global_label_dangling": "warning",
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"hier_label_mismatch": "error",
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"label_dangling": "error",
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"lib_symbol_issues": "warning",
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"missing_bidi_pin": "warning",
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"missing_input_pin": "warning",
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"missing_power_pin": "error",
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"missing_unit": "warning",
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"multiple_net_names": "warning",
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"net_not_bus_member": "warning",
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"no_connect_connected": "warning",
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"pin_to_pin": "warning",
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"power_pin_not_driven": "error",
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"similar_labels": "warning",
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"simulation_model_issue": "error",
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"unannotated": "error",
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"unit_value_mismatch": "error",
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"unresolved_variable": "error",
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"net_settings": {
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"classes": [
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{
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"bus_width": 12.0,
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"bus_width": 12,
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"clearance": 0.2,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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"track_width": 0.25,
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"via_diameter": 0.8,
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"via_drill": 0.4,
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"wire_width": 6.0
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"wire_width": 6
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}
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],
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"meta": {
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"version": 2
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"version": 3
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},
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"net_colors": null,
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"netclass_assignments": null,
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"page_layout_descr_file": "",
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"plot_directory": "",
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"spice_adjust_passive_values": false,
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"spice_current_sheet_as_root": false,
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"spice_external_command": "spice \"%I\"",
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"spice_model_current_sheet_as_root": true,
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"spice_save_all_currents": false,
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"spice_save_all_voltages": false,
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"subpart_first_id": 65,

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