Pinned

1. FPGA-stereo-Camera-Basys3 FPGA-stereo-Camera-Basys3 Public

   Integration of two camera 📷 modules to Basys 3 FPGA

   Verilog 32 7

2. sweetRV sweetRV Public

   sweetRV 🧁 is a SoC with a minimal RISC-V processor with firmware for IceSugar-Nano FPGA

   C++ 4 1

3. RTK-NTRIP-RTCM RTK-NTRIP-RTCM Public

   Contains program to Send RTCM3 📡 data to Hosted NTRIP server and fetch NTRIP data and display on another rover. Real time kinematic supported base and rover (Ublox-M8P) GPS units are required.

   Python 24 6

4. FPGA-DepthMap-Basys3 FPGA-DepthMap-Basys3 Public

   Real Time depth map 🏞️ generation using SSD algorithm on low end Basys 3 FPGA. Support 320x240 and 160x120 resolutions.

   VHDL 10 3

5. FPGA_depthMap FPGA_depthMap Public

   Using stereo vision 👀 to identify the obstacles by processing images on a FPGA

   Jupyter Notebook 9 6

6. ice40lib ice40lib Public

   Peripheral library 📚 for open source FPGAs based on iCE40. (Configured for ICESugar-Nano)

   Verilog 4