Skip to content

Commit

Permalink
Minor fix (#47)
Browse files Browse the repository at this point in the history
* add SIEVE to be the main cache of TinyLFU algorithm

* log fix

* Add options for trace print formatting

* add a note how to run the caffeine simulator

* Update table of contents in README.md
  • Loading branch information
1a1a11a committed Jan 4, 2024
1 parent 4d47e20 commit 938165f
Show file tree
Hide file tree
Showing 7 changed files with 86 additions and 32 deletions.
42 changes: 25 additions & 17 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -4,22 +4,30 @@


<!-- TOC start (generated with https://github.com/derlin/bitdowntoc) -->
* [What is libCacheSim](#what-is-libcachesim)
* [libCacheSim features ](#libcachesim-features)
* [Supported algorithms](#supported-algorithms)
* [Build and Install libCacheSim](#build-and-install-libcachesim)
+ [One-line install](#one-line-install)
+ [Install dependency](#install-dependency)
+ [Build libCacheSim](#build-libcachesim)
* [Usage](#usage)
+ [cachesim (a high-performance cache simulator)](#cachesim-a-high-performance-cache-simulator)
+ [Trace analysis](#trace-analysis)
+ [Using libCacheSim as a library ](#using-libcachesim-as-a-library)
+ [Extending libCacheSim (new algorithms and trace types)](#extending-libcachesim-new-algorithms-and-trace-types)
* [Open source cache traces](#open-source-cache-traces)
* [Questions? ](#questions)
* [Reference](#reference)
* [License](#license)
- [libCacheSim - building and running cache simulations](#libcachesim---building-and-running-cache-simulations)
- [News](#news)
- [What is libCacheSim](#what-is-libcachesim)
- [libCacheSim features](#libcachesim-features)
- [Supported algorithms](#supported-algorithms)
- [Build and Install libCacheSim](#build-and-install-libcachesim)
- [One-line install](#one-line-install)
- [Install dependency](#install-dependency)
- [Build libCacheSim](#build-libcachesim)
- [Usage](#usage)
- [cachesim (a high-performance cache simulator)](#cachesim-a-high-performance-cache-simulator)
- [basic usage](#basic-usage)
- [Run a single cache simulation](#run-a-single-cache-simulation)
- [Run multiple cache simulations with different cache sizes](#run-multiple-cache-simulations-with-different-cache-sizes)
- [Plot miss ratio curve](#plot-miss-ratio-curve)
- [Trace analysis](#trace-analysis)
- [Using libCacheSim as a library](#using-libcachesim-as-a-library)
- [Extending libCacheSim (new algorithms and trace types)](#extending-libcachesim-new-algorithms-and-trace-types)
- [Open source cache traces](#open-source-cache-traces)
- [Questions?](#questions)
- [Contributions](#contributions)
- [Reference](#reference)
- [License](#license)
- [Related](#related)
<!-- TOC end -->


Expand Down Expand Up @@ -251,7 +259,7 @@ The compressed traces can be used with libCacheSim without decompression. And li
| Tencent Photo | 2018 | object | [link](http://iotta.snia.org/traces/parallel?only=27476) | [link](https://ftp.pdl.cmu.edu/pub/datasets/twemcacheWorkload/cacheDatasets/tencentPhoto/) |
| WikiCDN | 2019 | object | [link](https://wikitech.wikimedia.org/wiki/Analytics/Data_Lake/Traffic/Caching) | [link](https://ftp.pdl.cmu.edu/pub/datasets/twemcacheWorkload/cacheDatasets/wiki/) |
| Tencent CBS | 2020 | block | [link](http://iotta.snia.org/traces/parallel?only=27917) | [link](https://ftp.pdl.cmu.edu/pub/datasets/twemcacheWorkload/cacheDatasets/tencentBlock/) |
| Alibaba CBS | 2020 | block | [link](https://github.com/alibaba/block-traces) | [link](https://ftp.pdl.cmu.edu/pub/datasets/twemcacheWorkload/cacheDatasets/alibabaBlock/) |
| Alibaba Block | 2020 | block | [link](https://github.com/alibaba/block-traces) | [link](https://ftp.pdl.cmu.edu/pub/datasets/twemcacheWorkload/cacheDatasets/alibabaBlock/) |
| Twitter | 2020 | key-value | [link](https://github.com/twitter/cache-traces) | [link](https://ftp.pdl.cmu.edu/pub/datasets/twemcacheWorkload/cacheDatasets/twitter/) |
| MetaKV | 2022 | key-value | [link](https://cachelib.org/docs/Cache_Library_User_Guides/Cachebench_FB_HW_eval/#list-of-traces) | [link](https://ftp.pdl.cmu.edu/pub/datasets/twemcacheWorkload/cacheDatasets/metaKV/) |
| MetaCDN | 2023 | object | [link](https://cachelib.org/docs/Cache_Library_User_Guides/Cachebench_FB_HW_eval/#list-of-traces) | [link](https://ftp.pdl.cmu.edu/pub/datasets/twemcacheWorkload/cacheDatasets/metaCDN/) |
Expand Down
25 changes: 24 additions & 1 deletion libCacheSim/bin/traceUtils/cli_parser.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,9 @@ enum argp_option_short {

// trace print
OPTION_NUM_REQ = 'n',
OPTION_FIELD_DELIMITER = 0x201,
OPTION_OBJ_ID_ONLY = 0x202,
OPTION_OBJ_ID_32bit = 0x204,

// trace filter
OPTION_FILTER_TYPE = 0x301,
Expand Down Expand Up @@ -63,6 +66,11 @@ static struct argp_option options[] = {
{0, 0, 0, 0, "tracePrint options:"},
{"num-req", OPTION_NUM_REQ, "-1", 0,
"Number of requests to process, -1 means all requests in the trace", 6},
{"field-delimiter", OPTION_FIELD_DELIMITER, ",", 0,
"The delimiter formatting the trace", 6},
{"obj-id-only", OPTION_OBJ_ID_ONLY, "0", 0, "Only to print object id", 6},
{"obj-id-32bit", OPTION_OBJ_ID_32bit, "0", 0,
"Print object id as 32-bit int", 6},

{0, 0, 0, 0, "traceFilter options:"},
{"filter-type", OPTION_FILTER_TYPE, "FIFO", 0,
Expand Down Expand Up @@ -106,6 +114,15 @@ static error_t parse_opt(int key, char *arg, struct argp_state *state) {
case OPTION_NUM_REQ:
arguments->n_req = atoll(arg);
break;
case OPTION_FIELD_DELIMITER:
arguments->delimiter = arg[0];
break;
case OPTION_OBJ_ID_ONLY:
arguments->print_obj_id_only = atol(arg);
break;
case OPTION_OBJ_ID_32bit:
arguments->print_obj_id_32bit = atol(arg);
break;
case OPTION_FILTER_TYPE:
arguments->cache_name = arg;
break;
Expand Down Expand Up @@ -146,6 +163,8 @@ static char doc[] =
"tracePrint: utility to print binary trace in human-readable format\n"
"traceConv: utility to convert a trace to oracleGeneral format\n\n"
"traceFilter: utility to filter a trace\n\n"
"example usage: ./tracePrint /trace/path oracleGeneral -n 20 "
"--obj-id-only=1\n\n"
"example usage: ./traceConv /trace/path csv -o "
"/path/new_trace.oracleGeneral -t "
"\"obj-id-col=5,time-col=2,obj-size-col=4\"\n\n"
Expand All @@ -171,6 +190,9 @@ static void init_arg(struct arguments *args) {
args->remove_size_change = false;
args->cache_name = NULL;
args->cache_size = 0;
args->delimiter = ',';
args->print_obj_id_only = false;
args->print_obj_id_32bit = false;
}

static void print_parsed_arg(struct arguments *args) {
Expand Down Expand Up @@ -229,7 +251,8 @@ void parse_cmd(int argc, char *argv[], struct arguments *args) {
assert(N_ARGS == 2);

args->reader = create_reader(args->trace_type_str, args->trace_path,
args->trace_type_params, args->n_req, args->ignore_obj_size, 0);
args->trace_type_params, args->n_req,
args->ignore_obj_size, 0);

print_parsed_arg(args);
}
Expand Down
3 changes: 3 additions & 0 deletions libCacheSim/bin/traceUtils/internal.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,9 @@ struct arguments {

/* trace print */
int64_t num_req; /* number of requests to print */
char delimiter;
bool print_obj_id_only;
bool print_obj_id_32bit;

/* trace filter */
char *cache_name;
Expand Down
32 changes: 20 additions & 12 deletions libCacheSim/bin/traceUtils/tracePrintMain.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -8,30 +8,39 @@
#include "../../include/libCacheSim/reader.h"
#include "internal.hpp"


int main(int argc, char *argv[]) {
struct arguments args;

cli::parse_cmd(argc, argv, &args);

request_t *req = new_request();
read_one_req(args.reader, req);

bool trace_has_next_access_vtime = req->next_access_vtime != -2;

if (trace_has_next_access_vtime) {
printf("# time, object, size, next_access_vtime\n");
} else {
printf("# time, object, size\n");
if (!args.print_obj_id_only) {
if (trace_has_next_access_vtime) {
printf("# time,object,size,next_access_vtime\n");
} else {
printf("# time,object,size\n");
}
}

while (req->valid) {
printf("%ld, %lu, %d", (long)req->clock_time, (unsigned long)req->obj_id,
(int)req->obj_size);
if (trace_has_next_access_vtime) {
printf(", %ld\n", (long)req->next_access_vtime);
if (args.print_obj_id_32bit) {
req->obj_id = (uint32_t)req->obj_id;
}

if (args.print_obj_id_only) {
printf("%lu\n", (unsigned long)req->obj_id);
} else {
printf("\n");
printf("%ld%c%lu%c%d", (long)req->clock_time, args.delimiter,
(unsigned long)req->obj_id, args.delimiter, (int)req->obj_size);
if (trace_has_next_access_vtime) {
printf("%c%ld\n", args.delimiter, (long)req->next_access_vtime);
} else {
printf("\n");
}
}
read_one_req(args.reader, req);
}
Expand All @@ -40,4 +49,3 @@ int main(int argc, char *argv[]) {

return 0;
}

2 changes: 2 additions & 0 deletions libCacheSim/cache/eviction/WTinyLFU.c
Original file line number Diff line number Diff line change
Expand Up @@ -138,6 +138,8 @@ cache_t *WTinyLFU_init(const common_cache_params_t ccache_params,
params->main_cache = Hyperbolic_init(ccache_params_local, NULL);
} else if (strcasecmp(params->main_cache_type, "LHD") == 0) {
params->main_cache = LHD_init(ccache_params_local, NULL);
} else if (strcasecmp(params->main_cache_type, "SIEVE") == 0) {
params->main_cache = Sieve_init(ccache_params_local, NULL);
} else {
ERROR("WTinyLFU does not support %s \n", params->main_cache_type);
}
Expand Down
5 changes: 3 additions & 2 deletions libCacheSim/traceAnalyzer/analyzer.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -110,8 +110,9 @@ void traceAnalyzer::TraceAnalyzer::run() {
if (curr_time_window_idx != time_to_window_idx(req->clock_time)) {
ERROR(
"The data is not ordered by time, please sort the trace first!"
"Current time %ld requested object %lu\n",
(long) req->clock_time + start_ts_, (unsigned long) req->obj_id);
"Current time %ld requested object %lu, obj size %lu\n",
(long)req->clock_time + start_ts_, (unsigned long)req->obj_id,
req->obj_size);
}

DEBUG_ASSERT(curr_time_window_idx == time_to_window_idx(req->clock_time));
Expand Down
9 changes: 9 additions & 0 deletions scripts/note
Original file line number Diff line number Diff line change
@@ -0,0 +1,9 @@
## How to run Caffeine simulator
```
git clone https://github.com/ben-manes/caffeine.git
./gradlew build
export GRADLE_OPTS="-Xmx204800m"
# modify simulator/src/main/resources/reference.conf, the lirs format is txt with only the object id
./gradlew run simulator:run

```

0 comments on commit 938165f

Please sign in to comment.