[DAGCircuit Oxidation] Refactor bit management in CircuitData

[kevinhartman]

Summary

This is part of the work we're doing to port DAGCircuit to Rust. It's work I've pulled out of a local branch where I'm doing that port, in an effort to reduce the size of that eventual PR.

Details and comments

• Added zero-cost struct types for our native Qubit and Clbit representation.
• Added a new struct BitData which encapsulates maintaining a mapping between native Rust bit types and Python bit types. This significantly cleans up the code in CircuitData and makes it reusable for DAGCircuit.
• Made InternContext into a generic SlottedCache data structure, which implements slotted caching for any T which is Hash and Eq. This is used to implement the new trait Interner<Vec<Qubit>> and Interner<Vec<Clbit>> for CircuitData.
• Added Interner trait, for defining interner semantics for containers like CircuitData (and DAGCircuit).
• Added PyNativeMapper trait, for defining a mapping between Python and native Rust types for containers like CircuitData.
• Added trait InstructionPacker, implemented for containers which provide intern semantics for bit lists and mappings from Python bits to native bits. This allows us to share our instruction packing implementation between CircuitData and DAGCircuit.

[qiskit-bot]

One or more of the the following people are requested to review this:

• @Eric-Arellano
• @Qiskit/terra-core
• @kevinhartman
• @mtreinish

[coveralls]

Pull Request Test Coverage Report for Build 9019232369

Details

• 234 of 248 (94.35%) changed or added relevant lines in 6 files are covered.
• 17 unchanged lines in 3 files lost coverage.
• Overall coverage increased (+0.02%) to 89.648%

---

Changes Missing Coverage	Covered Lines	Changed/Added Lines	%
crates/circuit/src/slotted_cache.rs	20	23	86.96%
crates/circuit/src/packed_instruction.rs	57	61	93.44%
crates/circuit/src/bit_data.rs	68	75	90.67%

Files with Coverage Reduction	New Missed Lines	%
qiskit/transpiler/passes/synthesis/unitary_synthesis.py	1	88.38%
crates/qasm2/src/lex.rs	4	92.88%
crates/qasm2/src/parse.rs	12	97.15%

Totals
Change from base Build 9004289325:	0.02%
Covered Lines:	62248
Relevant Lines:	69436

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💛 - Coveralls

[mtreinish]

I'm wondering if we maybe should remove one of the layers of abstraction here. It's something I've been thinking about in #12205 is that the source of truth for bits is still python but for interaction from rust space this isn't super ergonomic. I'm wondering if instead of playing games like this we try flattening the two representations. I guess the complexity is things like register and index (although #11596 will take care of that)

[jakelishman]

I'm not sure if this is what you were getting at, but I was thinking longer term that we'll want/need to make it possible to construct circuits from Rust space without creating any Python objects at all. We might not be at that point yet, but it might to be thinking about it.

[mtreinish]

Yeah, that's basically what I was getting at, having a pattern for making a circuit without any python interaction is what we'll want longer term. The example I have for making circuits from rust space right now still needs a py handle because we need to instantiate Qubit objects.

[kevinhartman]

I'd agree as well. BitAsKey isn't new here, though. I've only moved it from CircuitData.

Also, the source of truth for bits is CircuitData. It owns its bits, and QuantumCircuit simply "references" them.

[kevinhartman]

I'm rethinking a bit of this PR (specifically the stuff with packing and interning) so I'm going to put this into draft for now.

The BitData stuff is likely to stay, but I'm likely to reduce the traiting stuff around packing and interning a bit.