Playground for VGA projects on Tiny Tapeout
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Updated
May 22, 2024 - JavaScript
Playground for VGA projects on Tiny Tapeout
🖥️ A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
Hardware Description Languages
https://github.com/krevanth/ZAP : The official GIT repo of the ZAP processor. (C) 2016-2024 Revanth Kamaraj. The ZAP processor is capable of executing legacy ARM binaries. Please see Notice in README.
XLS: Accelerated HW Synthesis
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/
Verilator open-source SystemVerilog simulator and lint system
MCP482x DAC Family VHDL Core
A small, light weight, RISC CPU soft core
Tiny Tapeout 7 project: A simulation of Conways' Game of Life visualized to an ANSI terminal over UART
HDL libraries and projects
Haskell to VHDL/Verilog/SystemVerilog compiler
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