A compiler for a custom made language to control robots.
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Updated
Dec 18, 2016 - Assembly
A compiler for a custom made language to control robots.
Design MMU for socfpga-linux 4.11. Test with Altera DE2-115.
Trivia game programmed in Assembly using NIOS II instruction set - FINISHED BETA TESTING - VERSION 1.00 RELEASED!
Guitar amp sim for Altera DE1-SoC NIOS2
Various VGA video output projects on the NIOS II processor
Hardware Description Languages
Matrix multiplication on multiple Nios II cores
Code from FPGA programming with the Altera Nios II
A Deep Neural Network-inference accelerator is created in hardware. The codes for hardware is written in System Verilog. The hardware module is interfaced with NIOS computer system, thus this hardware acts as a peripheral to the computer system. The driver code to interface the hardware is written in C. Speedup compard to software is 400 times.
A sample design of Nios with on-board SDRAM for CYC1000 (a low cost Cyclone10 FPGA board)
Designing a simple processor system on FPGA. This is demo project to test FPGA DE10-Standard and develop a simpe Nios2 app.
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