This is a raw code dump of a very unfinished MOS6581 emulation project. The code was hacked together while learning Verilog, and may therefore lack some refinement.
Most SID tunes work fine. Even digi-sounds work somehow, despite the slow serial protocol I used for testing. A good next step would be to integrate a 6502 emulator for stand-alone operation or connect it to a real C64.
The wave and envelope generators are based on the Bob Yannes interview, the state-variable filter is inspired by Kebby^Farbrausch's TinySID player, and the rest is similar to the countless other SID projects on the net.
The code can be compiled using Altera Quartus Prime 15.1 and was tested on a BeMicro MAX10 board.
Only two pins are used:
GPIO_02 - UART input, 115200 8N1
You need a modified SID player on a PC to send register accesses over an USB->UART converter or similar. The protocol is extremely simple:
- 1st byte: register address 0-31
- 2nd byte: data to write
This is fast enough for normal SID tunes which write 25 registers at 50 or 60 Hz. SID tunes with digisounds will need a higher baudrate to work correctly.
GPIO_04 - 16-Bit sigma-delta audio output
Just wire up a 10uF capacitor and a headphone jack in series:
- GPIO_04 (J3 Pin 2) - 10uF - Headphones - GND (J3 Pin 12)
Copyright (c)2015-2017 Thomas Kindler mail_sid@t-kindler.de
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