v0.15.3

SiliconCompiler 0.15.3 (2023-09-21)

Minor:

• Fixes to sc-show for viewing remote files to ensure it does not attempt to use the file paths from the remote, but instead the local file paths.

• Tools:

  • klayout: Use build technology files and layer display files in show and ensure these are placed into the outputs directory when exporting to a GDS.

v0.15.2

SiliconCompiler 0.15.2 (2023-09-18)

Minor:

• Fixes minor bug in the dashboard which prevented the launching the dashboard.

• Ensures all tool output goes through the logger.

• Improved implementation of .valid() to provide faster checking.

• Tools:

  • OpenROAD: fixed bugs in instance creation and pin access function calls. Implemented support for multiple library corners assigned to a single scenario in timing constraints.
  • yosys: Implemented support for multiple library corners assigned to a single scenario in timing constraints.

v0.15.1

SiliconCompiler 0.15.1 (2023-09-08)

Major:

• Merged sc-configure into sc-remote to unify the remote interface

Minor:

• Fixed missing information in documentation build for flowgraphs.
• Removed call to delete_job on remote jobs, relying on remote to handle cleanup instead.
• Refactored core run functions for better code management.

v0.15.0

SiliconCompiler 0.15.0 (2023-08-31)

Major:

• Updated schema to remove unused ['option', 'skipstep'] key and add record to store the remote job id in ['record', 'remoteid'].

Minor:

• Added additional error checking and file cleanup to remote run to ensure empty files are not left behind.
• Fixed handling of setting list of tuples in the schema to corrected parse the values.
• Tools:
  • OpenROAD - disabled timing optimizations by default, added support for generating report images in the screenshot task via ['tool', 'openroad', 'task', 'screenshot', 'var', 'include_report_images'].
  • Chisel - added support for handling build.sbt via the input fileset ['input', 'config', 'chisel'].

v0.14.0

SiliconCompiler 0.14.0 (2023-08-21)

Major:

• Reworked FPGA to allow for better handling of FPGA parameters in the schema.
• Added missing mechanical parameters to the schema and updating the signal interface naming for clarity.
• Stop execution upon node failures, instead of continuing with repeated failures.

Minor:

• Ensure ['option', 'nodisplay'] is set when the environment does not support graphics.

• Added error checking for ['option', 'steplist'] to match current flowgraph.

• Removed physyn step from asicflow.

• Fixed issue when running remote and the submitted files are not updated.

• Tools:

  • OpenROAD - update default value for [..., 'var', 'grt_macro_extension'] to '0' to allow for better routing.
  • verilator - reworked options selection to allow for better control of user selected tool options.
  • yosys - added support for blackboxes in libraries via ['library', <lib>, 'output', 'blackbox', 'verilog'].

v0.13.2

SiliconCompiler 0.13.2 (2023-08-10)

Major:

• Added graphs view to dashboard for comparing metrics across runs.
• Added sc-remote app for checking server status and interacting with running remote jobs (replaces sc-ping).

Minor:

• Added checkbox to dashboard for enabling "raw" view of manifest.
• Tools:
  • OpenROAD - made repair_design more verbose (requires updated version), added option to generate design images at end of task via ['tool', 'openroad', 'task', <task>, 'var', 'ord_enable_images'], tweaked pin placement behavior, added SDF file output to export task.
  • surelog - fixed driver to sanitize escape characters in Verilog output, added option to disable write cache via ['tool', 'surelog', 'task', 'parse', 'var', 'disable_write_cache'].
  • klayout - added option to allow missing cells in stream files via ['library', <lib>, 'option', 'var', 'klayout_allow_missing_cell'], added option to set DB units via ['pdk', <pdk>, 'var', 'klayout', 'units', <stackup>].

v0.13.1

SiliconCompiler 0.13.1 (2023-07-21)

Minor:

• Improved remote run reliability, including graceful time-outs when server not responding and thread-safety fixes.
• Added ['option', 'libext'] support for Surelog, Verilator, and Icarus.
• Removed dashboard support for Python 3.6.
• Made aesthetic tweaks to dashboard.
• Fixed bundled Surelog on pre-macOS 12.
• Tools:
  • yosys - fixed synthesis strategies.
  • verilator - added multithreading, added FST trace format support.
  • OpenROAD - bumped minimum version to better support IR drop analysis, added additional controls for abstract LEF generation, updated scripts to improve ORFS correspondence, fixed to use correct layers for parasitic estimation.****

v0.13.0.post1

SiliconCompiler 0.13.0.post1 (2023-07-08)

Minor:

• Fix window wheels build

v0.13.0

SiliconCompiler 0.13.0 (2023-07-07)

Major:

• Added dashboard to SiliconCompiler to allow better inspection of the run information and added sc-dashboard app to open and display the dashboard.

Minor:

• Added ['input', 'constraint', 'upf'] as a recognized format
• Tools:
  • surelog - added support for lowmem option via ['tool', 'surelog', 'task', 'parse', 'var', 'enable_lowmem']

v0.12.3

SiliconCompiler 0.12.3 (2023-06-23)

Major:

• Added new flow screenshotflow to enable generating high quality stream images via klayout and imagemagick/montage.
• Added new tool execute to enable executing the output of a previous task, such as in the case of compiling a binary in one step and executing it in the next.

Minor:

• sc-show fixed error handling when attempting to how a file without a manifest.
• Added support for pathlib.Path objects when setting file and dir type parameters in the manifest.
• Tools:
  • yosys - fixed marking liberty files dont_use and ensure each library is merged together for ABC. Updated driver to use lower case true/false for ['tool', 'openroad', 'task', '*', 'var'] to be consistent with other tools.
  • verilator - added support for pins-bv via ['tool', 'verilator', 'task', 'compile', 'var', 'pins_bv'] and compile modes via ['tool', 'verilator', 'task', 'compile', 'var', 'mode'].