disable verilog formatting check

siliconcompiler · May 6, 2024 · dfbcd02 · dfbcd02
1 parent 453186e
commit dfbcd02
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Showing 2 changed files with 5 additions and 5 deletions.
diff --git a/.github/workflows/bin/format_verilog.sh b/.github/workflows/bin/format_verilog.sh
@@ -18,10 +18,10 @@ find . \( \
     -or -path "./lambdalib/utils/templates/*" \
 \) >> $FILES
 
-verible-verilog-format \
-    --failsafe_success=false \
-    --indentation_spaces 4 \
-    --inplace `cat $FILES`
+#verible-verilog-format \
+#    --failsafe_success=false \
+#    --indentation_spaces 4 \
+#    --inplace `cat $FILES`
 
 cat $FILES
 rm $FILES
diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
@@ -58,6 +58,6 @@ jobs:
           git diff --exit-code
 
       - name: Check lint
-        if: success() || steps.check-format.conclusion == 'failure'
+        if: success()
         run: |
           verible-verilog-lint --rules_config ./.github/workflows/config/verible.rules `cat files.txt`