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Adding Future Avalanche Board design files #109

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CLappin
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@CLappin CLappin commented Mar 20, 2019

Hi,

Opening pull request to add design files for the Future Avalanche Board.
This design contains an RV64IMAFDC rocket core with SiFive Blocks (UART and GPIO).
The GPIOs are connected to the 4 LEDs on the board and the UART is connected to the FTDI UART pins.

There is also a script in the FPGA shell which I'll put a link to in a comment to follow that will build the complete libero project in Libero 12. all the constraints are also included in the FPGA-Shell. I will create a pull request for this in the next few minutes.

Let me know if you need me to do any updates to this work.

Thanks,
Ciaran

@tmagik
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tmagik commented Mar 21, 2019

Which branch/commit of fpga-shells were you using? If I do a clean checkout I get this:

[info] Done compiling.
[info] Compiling 66 Scala sources to /scratch/troyb/freedom-avalance/sifive-blocks/target/scala-2.12/classes ...
[info] Done compiling.
[info] Packaging /scratch/troyb/freedom-avalance/nvidia-dla-blocks/target/scala-2.12/nvdlablocks_2.12-0.1.0-SNAPSHOT.jar ...
[info] Done packaging.
[info] Packaging /scratch/troyb/freedom-avalance/sifive-blocks/target/scala-2.12/sifiveblocks_2.12-0.1.0-SNAPSHOT.jar ...
[info] Done packaging.
[info] Compiling 69 Scala sources to /scratch/troyb/freedom-avalance/fpga-shells/target/scala-2.12/classes ...
[info] Done compiling.
[info] Packaging /scratch/troyb/freedom-avalance/fpga-shells/target/scala-2.12/fpgashells_2.12-0.1.0-SNAPSHOT.jar ...
[info] Done packaging.
[info] Compiling 11 Scala sources to /scratch/troyb/freedom-avalance/target/scala-2.12/classes ...
[error] /scratch/troyb/freedom-avalance/src/main/scala/unleashed/u500polarfireavalanchekit/Config.scala:16:8: object MemoryMicrosemiAvalancheBoardDDR3Key is not a member of package sifive.fpgashells.devices.microsemi.polarfireddr3
[error] import sifive.fpgashells.devices.microsemi.polarfireddr3.{MemoryMicrosemiAvalancheBoardDDR3Key, PolarFireAvalancheBoardDDR3Params}
[error]        ^
[error] /scratch/troyb/freedom-avalance/src/main/scala/unleashed/u500polarfireavalanchekit/Config.scala:43:10: not found: value MemoryMicrosemiAvalancheBoardDDR3Key
[error]     case MemoryMicrosemiAvalancheBoardDDR3Key => PolarFireAvalancheBoardDDR3Params(address = Seq(AddressSet(0x80000000L,0x40000000L-1))) //1GB
[error]          ^
[error] /scratch/troyb/freedom-avalance/src/main/scala/unleashed/u500polarfireavalanchekit/Config.scala:43:50: not found: value PolarFireAvalancheBoardDDR3Params
[error]     case MemoryMicrosemiAvalancheBoardDDR3Key => PolarFireAvalancheBoardDDR3Params(address = Seq(AddressSet(0x80000000L,0x40000000L-1))) //1GB
[error]                                                  ^
[error] /scratch/troyb/freedom-avalance/src/main/scala/unleashed/u500polarfireavalanchekit/Config.scala:43:84: not found: value address
[error]     case MemoryMicrosemiAvalancheBoardDDR3Key => PolarFireAvalancheBoardDDR3Params(address = Seq(AddressSet(0x80000000L,0x40000000L-1))) //1GB
[error]                                                                                    ^
[error] /scratch/troyb/freedom-avalance/src/main/scala/unleashed/u500polarfireavalanchekit/FPGAChip.scala:14:42: object polarfireavalanchekitshell is not a member of package sifive.fpgashells.shell.microsemi
[error] import sifive.fpgashells.shell.microsemi.polarfireavalanchekitshell._
[error]                                          ^
[error] /scratch/troyb/freedom-avalance/src/main/scala/unleashed/u500polarfireavalanchekit/FPGAChip.scala:32:13: not found: type PolarFireAvalancheKitShell
[error]     extends PolarFireAvalancheKitShell
[error]             ^
[error] /scratch/troyb/freedom-avalance/src/main/scala/unleashed/u500polarfireavalanchekit/FPGAChip.scala:33:10: not found: type HasDDR3
[error]     with HasDDR3 {
[error]          ^
[error] /scratch/troyb/freedom-avalance/src/main/scala/unleashed/u500polarfireavalanchekit/FPGAChip.scala:40:21: not found: value dut_clock
[error]   withClockAndReset(dut_clock, dut_reset) {
[error]                     ^
[error] /scratch/troyb/freedom-avalance/src/main/scala/unleashed/u500polarfireavalanchekit/FPGAChip.scala:40:32: not found: value dut_reset
[error]   withClockAndReset(dut_clock, dut_reset) {
[error]                                ^
[error] /scratch/troyb/freedom-avalance/src/main/scala/unleashed/u500polarfireavalanchekit/System.scala:28:10: not found: type HasMemoryPolarFireAvalancheBoardDDR3
[error]     with HasMemoryPolarFireAvalancheBoardDDR3{
[error]          ^
[error] /scratch/troyb/freedom-avalance/src/main/scala/unleashed/u500polarfireavalanchekit/System.scala:38:10: not found: type HasMemoryPolarFireAvalancheBoardDDR3ModuleImp
[error]     with HasMemoryPolarFireAvalancheBoardDDR3ModuleImp```

@CLappin
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CLappin commented Mar 21, 2019

Hi,

I was using this version of FPGA_Shell .

It hasn't been accepted into the main branch of FPGA_Shell yet.

Thanks,
Ciaran

@tmagik
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tmagik commented Apr 20, 2019

FYI, @erikdanie has updated and merged the PolarFire code for Vera IOfpga, and it's now stable and running. Please take a look at the new scala code, I'd like to get your PRs for Avalanche updated and tested.

What do we need to connect the Avalanche ethernet port up to something we can use in Linux? I'm also quite curious what we can do with the SerDES SFP cage.

@CLappin
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CLappin commented Apr 26, 2019

Hi,
I can try take a look at this in the next few days.
I'm not 100% sure what cores are needed to connect the the ethernet or SerDES to the processor.

Thanks,
Ciaran

@carlosedp
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Can this be used on the Polarfire Eval Kit ?

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3 participants