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Add initial riscv64 support #941

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@makotokato makotokato commented Jan 24, 2024

The defines for riscv64 are from Google's breakpad. This is tested on Ubuntu 23.10/riscv64 using generated minidump by Google's breakpad.

Comment on lines +1 to +2
// Copyright 2015 Ted Mielczarek. See the COPYRIGHT
// file at the top-level directory of this distribution.
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Not a big deal but I realize we have this header in most files but there's never been a top-level COPYRIGHT file. @luser what do you suggest we do for new files?

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There's a LICENSE file in the root of the repository, I think that should cover it? I would recommend dropping the license comments from individual files. I probably picked that habit up from Breakpad.

Comment on lines +180 to +183
// in a range covered by one of our modules). If we find such an instruction,
// we assume it's an pc value that was pushed by the CALL instruction that created
// the current frame. The next frame is then assumed to end just before that
// pc value.
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I guess this was copied from the other architectures, but RISC-V doesn't have a CALL instruction. It uses a AUIPC followed by a JALR instruction to call a function, you should amend the text above to reflect this (assume the logic below applies to RISC-V).

Comment on lines +289 to +293
// Arm leaf functions may not actually touch the stack (thanks
// to the link register allowing you to "push" the return address
// to a register), so we need to permit the stack pointer to not
// change for the first frame of the unwind. After that we need
// more strict validation to avoid infinite loops.
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Likewise this looks like a copy-paste error, does the logic here hold true for RISC-V too? I'm not sufficiently familiar with the ABI to be able to tell.

Comment on lines +303 to +309
// A caller's ip is the return address, which is the instruction
// *after* the CALL that caused us to arrive at the callee. Set
// the value to 4 less than that, so it points to the CALL instruction
// (arm64 instructions are all 4 bytes wide). This is important because
// we use this value to lookup the CFI we need to unwind the next frame.
let ip = frame.context.get_instruction_pointer();
frame.instruction = ip - 4;
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This is certainly wrong for RISC-V as the “C” extension for compressed instructions allows for 2-bytes wide instructions and all jumps have an address that is a multiple of 2 bytes.

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3 participants