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Idea for new project... simple DD1 Floppy controller...... #12

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pocoaust opened this issue Nov 24, 2022 · 6 comments
Open

Idea for new project... simple DD1 Floppy controller...... #12

pocoaust opened this issue Nov 24, 2022 · 6 comments

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@pocoaust
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Hi mate,

Love your work, have built the backplane and ROM board. No issues just an idea

Have you considered a simple DD1 Floppy interface replacement. They are getting very hard to find. The rom could go on the ROM board, and a small addon board could carry the fdd controller and support logic on your bus expansion.

I have attached the DDI schematic, could you give me your thoughts on this.

Best Regards
Paul

CPC664_Disk_Interface_Schematic

@revaldinho
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Thanks for your comments.

It's a good idea. I mean, there are plenty of SD card alternatives to the DDI-1 around for the 464/664 but I think that only Zaxon's DDI-3/4/5 boards provide physical drive interfaces. I actually do have a DDI-3 and it works very well, also with a Gotek as Drive B on the expansion connector.

Deleting the ROM and control circuitry is definitely the thing to do. I would like to keep any board smaller than 80x100mm to fit the freeware- Eagle license (100x100mm is also the limit for the cheap proto-packs from Seed). This would probably fit without the ROM.

I'll think about it. I have a couple of other projects in progress at the moment, so it may take a while to get to this and although I don't really need one myself, I agree that it would be worth making a clone more generally available.

@pocoaust
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pocoaust commented Nov 25, 2022 via email

@pocoaust
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pocoaust commented Nov 25, 2022 via email

@pocoaust
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pocoaust commented Nov 26, 2022 via email

@grafzahl12345
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Hi revald,
are you also still useing eagle and is there enough space in the cpld for a second adress select logic? So i'm intrested too, you can cut me in if you like.

@revaldinho
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Yes, for these projects at least I'm still using the netlister.py/freeware Eagle PCB tools.

For a DDI-1 clone without a ROM and the associated decoding I don't think there will be any need for a CPLD. It may be possible to reduce the chip count by refactoring what's left with the ROM logic gone, so I think that it should all fit the in the 80x100mm constraint without any need to go for a CPLD.

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3 participants