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Implement riscv_vlen_asm for riscv32
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riscvcap.c: undefined reference to 'riscv_vlen_asm'

Reviewed-by: Paul Dale <ppzgs1@gmail.com>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
(Merged from #24270)
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ZenithalHourlyRate authored and t8m committed May 10, 2024
1 parent 3de3d48 commit 87314d2
Showing 1 changed file with 17 additions and 0 deletions.
17 changes: 17 additions & 0 deletions crypto/riscv32cpuid.pl
Expand Up @@ -84,5 +84,22 @@
___
}

{
my ($ret) = ('a0');
$code .= <<___;
################################################################################
# size_t riscv_vlen_asm(void)
# Return VLEN (i.e. the length of a vector register in bits).
.p2align 3
.globl riscv_vlen_asm
.type riscv_vlen_asm,\@function
riscv_vlen_asm:
csrr $ret, vlenb
slli $ret, $ret, 3
ret
.size riscv_vlen_asm,.-riscv_vlen_asm
___
}

print $code;
close STDOUT or die "error closing STDOUT: $!";

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