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Close stale issues and PRs Close stale issues and PRs #232: Scheduled
June 6, 2024 01:50 14s master
master
June 6, 2024 01:50 14s
Update coverage script after exclude HPDcache module (#2197) bender-up-to-date #2010: Commit 278649d pushed by JeanRochCoulon
June 5, 2024 15:45 57s feature/interconnect
feature/interconnect
June 5, 2024 15:45 57s
Update coverage script after exclude HPDcache module (#2197) ci #2950: Commit 278649d pushed by JeanRochCoulon
June 5, 2024 15:45 42m 19s feature/interconnect
feature/interconnect
June 5, 2024 15:45 42m 19s
Branch feature/interconnect: fetch upstream (#2203) ci #2949: Commit 6197442 pushed by JeanRochCoulon
June 5, 2024 15:11 41m 46s feature/interconnect
feature/interconnect
June 5, 2024 15:11 41m 46s
Branch feature/interconnect: fetch upstream (#2203) bender-up-to-date #2009: Commit 6197442 pushed by JeanRochCoulon
June 5, 2024 15:11 56s feature/interconnect
feature/interconnect
June 5, 2024 15:11 56s
Branch feature/interconnect: fetch upstream ci #2948: Pull request #2203 opened by yanicasa
June 5, 2024 15:09 43m 16s master
master
June 5, 2024 15:09 43m 16s
Branch feature/interconnect: fetch upstream bender-up-to-date #2008: Pull request #2203 opened by yanicasa
June 5, 2024 15:09 1m 0s master
master
June 5, 2024 15:09 1m 0s
Branch feature/interconnect: fetch upstream Verible #929: Pull request #2203 opened by yanicasa
June 5, 2024 15:09 53s
June 5, 2024 15:09 53s
.github/workflows/dashboard-done.yml .github/workflows/dashboard-done.yml #1281: Manually run by zarubaf
June 5, 2024 10:48 10s master
master
June 5, 2024 10:48 10s
Update VCS compile flow to 2-step flow in testharness and update UART to version 0.2.1 bender-up-to-date #2007: Pull request #2196 synchronize by xiaoweish
June 5, 2024 09:51 56s xiaoweish:support_sverilog_uart
xiaoweish:support_sverilog_uart
June 5, 2024 09:51 56s
Update VCS compile flow to 2-step flow in testharness and update UART to version 0.2.1 ci #2947: Pull request #2196 synchronize by xiaoweish
June 5, 2024 09:51 42m 15s xiaoweish:support_sverilog_uart
xiaoweish:support_sverilog_uart
June 5, 2024 09:51 42m 15s
Update VCS compile flow to 2-step flow in testharness and update UART to version 0.2.1 bender-up-to-date #2006: Pull request #2196 reopened by xiaoweish
June 5, 2024 09:51 41s xiaoweish:support_sverilog_uart
xiaoweish:support_sverilog_uart
June 5, 2024 09:51 41s
Update VCS compile flow to 2-step flow in testharness and update UART to version 0.2.1 ci #2946: Pull request #2196 reopened by xiaoweish
June 5, 2024 09:51 42m 22s xiaoweish:support_sverilog_uart
xiaoweish:support_sverilog_uart
June 5, 2024 09:51 42m 22s
Update VCS compile flow to 2-step flow in testharness and update UART to version 0.2.1 Verible #928: Pull request #2196 reopened by xiaoweish
June 5, 2024 09:51 45s
June 5, 2024 09:51 45s
Update VCS compile flow to 2-step flow in testharness and update UART to version 0.2.1 Verible #927: Pull request #2196 synchronize by xiaoweish
June 5, 2024 09:51 56s
June 5, 2024 09:51 56s
Update coverage script after exclude HPDcache module (#2197) bender-up-to-date #2005: Commit 278649d pushed by JeanRochCoulon
June 5, 2024 07:55 57s master
master
June 5, 2024 07:55 57s
Update coverage script after exclude HPDcache module (#2197) ci #2945: Commit 278649d pushed by JeanRochCoulon
June 5, 2024 07:55 42m 32s master
master
June 5, 2024 07:55 42m 32s
pages build and deployment pages-build-deployment #737: by JeanRochCoulon
June 5, 2024 07:55 55s
June 5, 2024 07:55 55s
Update coverage script after exclude HPDcache module Verible #926: Pull request #2197 opened by AyoubJalali
June 5, 2024 07:53 49s
June 5, 2024 07:53 49s
Update coverage script after exclude HPDcache module ci #2944: Pull request #2197 opened by AyoubJalali
June 5, 2024 07:53 42m 25s ThalesSiliconSecurity:dev/update
ThalesSiliconSecurity:dev/update
June 5, 2024 07:53 42m 25s
Update coverage script after exclude HPDcache module bender-up-to-date #2004: Pull request #2197 opened by AyoubJalali
June 5, 2024 07:53 41s ThalesSiliconSecurity:dev/update
ThalesSiliconSecurity:dev/update
June 5, 2024 07:53 41s
.github/workflows/dashboard-done.yml .github/workflows/dashboard-done.yml #1280: Manually run by zarubaf
June 5, 2024 07:51 9s master
master
June 5, 2024 07:51 9s
Update VCS compile flow to 2-step flow in testharness and update UART to version 0.2.1 bender-up-to-date #2003: Pull request #2196 synchronize by xiaoweish
June 5, 2024 07:32 39s xiaoweish:support_sverilog_uart
xiaoweish:support_sverilog_uart
June 5, 2024 07:32 39s
Update VCS compile flow to 2-step flow in testharness and update UART to version 0.2.1 ci #2943: Pull request #2196 synchronize by xiaoweish
June 5, 2024 07:32 42m 0s xiaoweish:support_sverilog_uart
xiaoweish:support_sverilog_uart
June 5, 2024 07:32 42m 0s
Update VCS compile flow to 2-step flow in testharness and update UART to version 0.2.1 Verible #925: Pull request #2196 synchronize by xiaoweish
June 5, 2024 07:32 1m 7s
June 5, 2024 07:32 1m 7s