Add a precise time counter system register

[mbitsnbites]

Inspirations

• The 64-bit time-of-day (TOD) clock of the S/370 seems to have a fairly sound design.
  • The time unit of TOD is consistent across all implementations, and it is possible to derive an SI unit (microseconds) from the TOD with a single constant bit shift operation (i.e. no multiplication/division operations required).
  • On the negative side, very simple implementations with a single clock source may struggle to produce an accurate and jitter-free counter register.
  • See page 4-18 of 370-XA Principles of Operation.
• The RISC-V 64-bit counters are also fairly sound ("Zicntr" - Standard Extension for Base Counters and Timers).
  • CYCLE register - counts CPU cycles
  • TIME register - a real time clock with constant frequency (most similar to what we want)
  • INSTRET register - counts the number of instructions retired
• The x86 time-stamp-counter (TSC) is problematic.
  • The frequency at which the TSC is counted is not easily determined by the program.
  • If the TSC time unit could be queried by software, it would be possible to convert TSC values to actual time values. However, that requires a 64-bit division operation.
• Other architectures:
  • ARM: CCNT
  • PowerPC: TBR register
  • SPARC: TICK register
  • AVR32: PCCNT register

Questions

• Should read access to the counter be privileged?
• Should write access to the counter be privileged?
• Should each core (or thread of execution) have its own counter?

Suggested solution

• Use two 32-bit system registers that together form a 64-bit counter (possibly reserve two more registers in case we want to support 128-bit counters).
• Specify a fixed time unit/scale for the counter (see S/370 below).
• Allow the counter update frequency to vary (between implementations and during runtime - e.g. during low-power modes), but the time unit should always be consistent.

The S/370 specifies the time unit as 1 microsecond / 2^12:

In the basic form, the TOD clock is incremented by adding a one in bit position 51 [i.e. add 2^12] every microsecond. In models having a higher or lower resolution, a different bit position is incremented at such a frequency that the rate of advancing the clock is the same as if a one were added in bit position 51 every microsecond. The resolution of the TOD clock is such that the incrementing rate is comparable to the instruction-execution rate of the model.