GitHub - infiniteNOP/nopCPU_classic: Original nopCPU

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Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
COPYING		COPYING
HACKING		HACKING
Makefile		Makefile
README		README
alu.v		alu.v
control_unit.v		control_unit.v
cpu.v		cpu.v
cpu_tb.v		cpu_tb.v
regfile.v		regfile.v

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This is a simple 8-bit CPU I designed in order to learn Verilog.

It is licensed under the LGPL license. For more information, read the COPYING
file.

(One exception is the testbench, which is licensed under the ISC license.)

TODO:

        - Document it (Partially done. See the HACKING file.)
        - Write an assembler for it