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Add CH32V20x USB OTG/FS Driver #2362

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merged 9 commits into from May 20, 2024
Merged

Add CH32V20x USB OTG/FS Driver #2362

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db60fa1
add CH32V20x USB OTG/FS driver
dragonlock2 Nov 20, 2023
2a67ce7
change default risv-gcc to riscv-none-elf- and add _zicsr extension
hathach May 15, 2024
ab5f276
fix ep0 stall not clearing
dragonlock2 May 17, 2024
5fee292
temp code
hathach May 17, 2024
4a5fee5
- update ch203 family to allow to specify flash and ram size. Introduce
hathach May 20, 2024
b19295c
use correct wch usbhs, usbfs for ch32v307 using CFG_TUD_MAX_SPEED
hathach May 20, 2024
07d8793
code format
hathach May 20, 2024
3b144be
try fixing codeql
hathach May 20, 2024
10b1e38
revert unrelated changes to video_device.c
hathach May 20, 2024
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4 changes: 2 additions & 2 deletions .github/workflows/ci_set_matrix.py
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Expand Up @@ -7,14 +7,14 @@
"arm-iar": "",
"arm-gcc": "",
"msp430-gcc": "http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/9_2_0_0/export/msp430-gcc-9.2.0.50_linux64.tar.bz2",
"riscv-gcc": "https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases/download/v10.1.0-1.1/xpack-riscv-none-embed-gcc-10.1.0-1.1-linux-x64.tar.gz",
"riscv-gcc": "https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v13.2.0-2/xpack-riscv-none-elf-gcc-13.2.0-2-linux-x64.tar.gz"
}

# family: [supported toolchain]
family_list = {
"broadcom_32bit": ["arm-gcc"],
"broadcom_64bit": ["aarch64-gcc"],
"ch32v307 fomu gd32vf103": ["riscv-gcc"],
"ch32v20x ch32v307 fomu gd32vf103": ["riscv-gcc"],
"imxrt": ["arm-gcc", "arm-clang"],
"kinetis_k kinetis_kl kinetis_k32l2": ["arm-gcc", "arm-clang"],
"lpc11 lpc13 lpc15": ["arm-gcc", "arm-clang"],
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1 change: 1 addition & 0 deletions .gitignore
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Expand Up @@ -82,6 +82,7 @@ hw/mcu/st/stm32l5xx_hal_driver
hw/mcu/st/stm32u5xx_hal_driver
hw/mcu/st/stm32wbxx_hal_driver
hw/mcu/ti
hw/mcu/wch/ch32v20x
hw/mcu/wch/ch32v307
hw/mcu/wch/ch32f20x
lib/CMSIS_5
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6 changes: 5 additions & 1 deletion .idea/cmake.xml
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2 changes: 1 addition & 1 deletion README.rst
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Expand Up @@ -157,7 +157,7 @@ Following CPUs are supported, check out `Supported Devices`_ for comprehensive l
+--------------+------------------------------------------------------------+
| ValentyUSB | eptri |
+--------------+------------------------------------------------------------+
| WCH | CH32F20x, CH32V307, |
| WCH | CH32F20x, CH32V20x, CH32V307 |
+--------------+------------------------------------------------------------+

License
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1 change: 1 addition & 0 deletions docs/reference/dependencies.rst
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Expand Up @@ -55,6 +55,7 @@ hw/mcu/st/stm32u5xx_hal_driver https://github.com/STMicroelectronics/
hw/mcu/st/stm32wbxx_hal_driver https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git 2c5f06638be516c1b772f768456ba637f077bac8 stm32wb
hw/mcu/ti https://github.com/hathach/ti_driver.git 143ed6cc20a7615d042b03b21e070197d473e6e5 msp430 msp432e4 tm4c123
hw/mcu/wch/ch32f20x https://github.com/openwch/ch32f20x.git 77c4095087e5ed2c548ec9058e655d0b8757663b ch32f20x
hw/mcu/wch/ch32v20x https://github.com/openwch/ch32v20x.git de6d68c654340d7f27b00cebbfc9aa2740a1abc2 ch32v20x
hw/mcu/wch/ch32v307 https://github.com/openwch/ch32v307.git 17761f5cf9dbbf2dcf665b7c04934188add20082 ch32v307
lib/CMSIS_5 https://github.com/ARM-software/CMSIS_5.git 20285262657d1b482d132d20d755c8c330d55c1f imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2xstm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb
lib/FreeRTOS-Kernel https://github.com/FreeRTOS/FreeRTOS-Kernel.git 4ff01a7a4a51f53b44496aefee1e3c0071b7b173 all
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6 changes: 3 additions & 3 deletions docs/reference/supported.rst
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Expand Up @@ -128,9 +128,9 @@ Supported MCUs
+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
| ValentyUSB | eptri | ✔ | ✖ | ✖ | eptri | |
+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
| WCH | CH32V307 | ✔ | | ✔ | ch32v307 | |
| +-----------------------+--------+------+-----------+-------------------+--------------+
| | CH32F20x | ✔ | | ✔ | ch32f205 | |
| WCH | CH32F20x | ✔ | | ✔ | ch32f205 | |
| | CH32V20x | ✔ | | ✖ | ch32v20x | |
| | CH32V307 | ✔ | | ✔ | ch32v307 | |
+--------------+-----------------------+--------+------+-----------+-------------------+--------------+


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4 changes: 2 additions & 2 deletions examples/build_system/cmake/cpu/rv32i-ilp32.cmake
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@@ -1,13 +1,13 @@
if (TOOLCHAIN STREQUAL "gcc")
set(TOOLCHAIN_COMMON_FLAGS
-march=rv32i
-march=rv32i_zicsr
-mabi=ilp32
)
set(FREERTOS_PORT GCC_RISC_V CACHE INTERNAL "")

elseif (TOOLCHAIN STREQUAL "clang")
set(TOOLCHAIN_COMMON_FLAGS
-march=rv32i
-march=rv32i_zicsr
-mabi=ilp32
)
set(FREERTOS_PORT GCC_RISC_V CACHE INTERNAL "")
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4 changes: 2 additions & 2 deletions examples/build_system/cmake/cpu/rv32imac-ilp32.cmake
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@@ -1,13 +1,13 @@
if (TOOLCHAIN STREQUAL "gcc")
set(TOOLCHAIN_COMMON_FLAGS
-march=rv32imac
-march=rv32imac_zicsr
-mabi=ilp32
)
set(FREERTOS_PORT GCC_RISC_V CACHE INTERNAL "")

elseif (TOOLCHAIN STREQUAL "clang")
set(TOOLCHAIN_COMMON_FLAGS
-march=rv32imac
-march=rv32imac_zicsr
-mabi=ilp32
)
set(FREERTOS_PORT GCC_RISC_V CACHE INTERNAL "")
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19 changes: 14 additions & 5 deletions examples/build_system/cmake/toolchain/riscv_gcc.cmake
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@@ -1,15 +1,24 @@
# default Toolchain from https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
if (NOT DEFINED CROSS_COMPILE)
set(CROSS_COMPILE "riscv-none-elf-")
endif ()

if (NOT DEFINED CMAKE_C_COMPILER)
set(CMAKE_C_COMPILER ${CROSS_COMPILE}gcc)
endif ()

if (NOT DEFINED CMAKE_C_COMPILER)
set(CMAKE_C_COMPILER "riscv-none-embed-gcc")
set(CMAKE_C_COMPILER ${CROSS_COMPILE}gcc)
endif ()

if (NOT DEFINED CMAKE_CXX_COMPILER)
set(CMAKE_CXX_COMPILER "riscv-none-embed-g++")
set(CMAKE_CXX_COMPILER ${CROSS_COMPILE}g++)
endif ()

set(CMAKE_ASM_COMPILER ${CMAKE_C_COMPILER})
set(CMAKE_SIZE "riscv-none-embed-size" CACHE FILEPATH "")
set(CMAKE_OBJCOPY "riscv-none-embed-objcopy" CACHE FILEPATH "")
set(CMAKE_OBJDUMP "riscv-none-embed-objdump" CACHE FILEPATH "")
set(CMAKE_SIZE ${CROSS_COMPILE}size CACHE FILEPATH "")
set(CMAKE_OBJCOPY ${CROSS_COMPILE}objcopy CACHE FILEPATH "")
set(CMAKE_OBJDUMP ${CROSS_COMPILE}objdump CACHE FILEPATH "")

include(${CMAKE_CURRENT_LIST_DIR}/common.cmake)

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11 changes: 7 additions & 4 deletions examples/build_system/make/cpu/rv32i-ilp32.mk
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@@ -1,12 +1,15 @@
ifeq ($(TOOLCHAIN),gcc)
CFLAGS += \
-march=rv32i \
-march=rv32i_zicsr \
-mabi=ilp32 \

else ifeq ($(TOOLCHAIN),iar)
#CFLAGS += --cpu cortex-a53
#ASFLAGS += --cpu cortex-a53
else ifeq ($(TOOLCHAIN),clang)
CFLAGS += \
-march=rv32i_zicsr \
-mabi=ilp32 \

else ifeq ($(TOOLCHAIN),iar)
$(error not support)
endif

# For freeRTOS port source
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10 changes: 7 additions & 3 deletions examples/build_system/make/cpu/rv32imac-ilp32.mk
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@@ -1,11 +1,15 @@
ifeq ($(TOOLCHAIN),gcc)
CFLAGS += \
-march=rv32imac \
-march=rv32imac_zicsr \
-mabi=ilp32 \

else ifeq ($(TOOLCHAIN),clang)
CFLAGS += \
-march=rv32imac_zicsr \
-mabi=ilp32 \

else ifeq ($(TOOLCHAIN),iar)
#CFLAGS += --cpu cortex-a53
#ASFLAGS += --cpu cortex-a53
$(error not support)

endif

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11 changes: 11 additions & 0 deletions examples/build_system/make/rules.mk
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Expand Up @@ -134,6 +134,17 @@ OPENOCD_OPTION ?=
flash-openocd: $(BUILD)/$(PROJECT).elf
openocd $(OPENOCD_OPTION) -c "program $< verify reset exit"

# --------------- openocd-wch -----------------
# wch-linke is not supported yet in official openOCD yet. We need to either use
# 1. download openocd as part of mounriver studio http://www.mounriver.com/download or
# 2. compiled from https://github.com/hathach/riscv-openocd-wch or
# https://github.com/dragonlock2/miscboards/blob/main/wch/SDK/riscv-openocd.tar.xz
# with ./configure --disable-werror --enable-wlinke --enable-ch347=no
OPENOCD_WCH ?= /home/${USER}/app/riscv-openocd-wch/src/openocd
OPENOCD_WCH_OPTION ?=
flash-openocd-wch: $(BUILD)/$(PROJECT).elf
$(OPENOCD_WCH) $(OPENOCD_WCH_OPTION) -c init -c halt -c "flash write_image $<" -c reset -c exit

# --------------- dfu-util -----------------
DFU_UTIL_OPTION ?= -a 0
flash-dfu-util: $(BUILD)/$(PROJECT).bin
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1 change: 1 addition & 0 deletions examples/device/audio_4_channel_mic_freertos/skip.txt
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@@ -1,3 +1,4 @@
mcu:CH32V20X
mcu:CH32V307
mcu:CXD56
mcu:F1C100S
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1 change: 1 addition & 0 deletions examples/device/audio_test_freertos/skip.txt
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@@ -1,3 +1,4 @@
mcu:CH32V20X
mcu:CH32V307
mcu:CXD56
mcu:F1C100S
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1 change: 1 addition & 0 deletions examples/device/cdc_msc_freertos/skip.txt
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@@ -1,3 +1,4 @@
mcu:CH32V20X
mcu:CH32V307
mcu:CXD56
mcu:F1C100S
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1 change: 1 addition & 0 deletions examples/device/hid_composite_freertos/skip.txt
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@@ -1,3 +1,4 @@
mcu:CH32V20X
mcu:CH32V307
mcu:CXD56
mcu:F1C100S
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